1//Original:/proj/frio/dv/testcases/core/c_seq_ex1_j_mv_pop/c_seq_ex1_j_mv_pop.dsp 2// Spec Reference: sequencer stage ex1 (jump + regmv + pushpopmultiple) 3# mach: bfin 4# sim: --environment operating 5 6#include "test.h" 7.include "testutils.inc" 8start 9 10include(std.inc) 11include(selfcheck.inc) 12include(gen_int.inc) 13INIT_R_REGS(0); 14INIT_P_REGS(0); 15INIT_I_REGS(0); // initialize the dsp address regs 16INIT_M_REGS(0); 17INIT_L_REGS(0); 18INIT_B_REGS(0); 19//CHECK_INIT(p5, 0xe0000000); 20include(symtable.inc) 21CHECK_INIT_DEF(p5); 22 23#ifndef STACKSIZE 24#define STACKSIZE 0x10 25#endif 26#ifndef EVT 27#define EVT 0xFFE02000 28#endif 29#ifndef EVT15 30#define EVT15 0xFFE0203C 31#endif 32#ifndef EVT_OVERRIDE 33#define EVT_OVERRIDE 0xFFE02100 34#endif 35#ifndef ITABLE 36#define ITABLE DATA_ADDR_1 37#endif 38 39GEN_INT_INIT(ITABLE) // set location for interrupt table 40 41// 42// Reset/Bootstrap Code 43// (Here we should set the processor operating modes, initialize registers, 44// 45 46BOOT: 47 48 // in reset mode now 49LD32_LABEL(sp, KSTACK); // setup the stack pointer 50FP = SP; // and frame pointer 51 52LD32(p0, EVT); // Setup Event Vectors and Handlers 53LD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0) 54 [ P0 ++ ] = R0; 55 56LD32_LABEL(r0, RHANDLE); // Reset Handler (Int1) 57 [ P0 ++ ] = R0; 58 59LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) 60 [ P0 ++ ] = R0; 61 62LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) 63 [ P0 ++ ] = R0; 64 65 [ P0 ++ ] = R0; // IVT4 not used 66 67LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) 68 [ P0 ++ ] = R0; 69 70LD32_LABEL(r0, THANDLE); // Timer Handler (Int6) 71 [ P0 ++ ] = R0; 72 73LD32_LABEL(r0, I7HANDLE); // IVG7 Handler 74 [ P0 ++ ] = R0; 75 76LD32_LABEL(r0, I8HANDLE); // IVG8 Handler 77 [ P0 ++ ] = R0; 78 79LD32_LABEL(r0, I9HANDLE); // IVG9 Handler 80 [ P0 ++ ] = R0; 81 82LD32_LABEL(r0, I10HANDLE);// IVG10 Handler 83 [ P0 ++ ] = R0; 84 85LD32_LABEL(r0, I11HANDLE);// IVG11 Handler 86 [ P0 ++ ] = R0; 87 88LD32_LABEL(r0, I12HANDLE);// IVG12 Handler 89 [ P0 ++ ] = R0; 90 91LD32_LABEL(r0, I13HANDLE);// IVG13 Handler 92 [ P0 ++ ] = R0; 93 94LD32_LABEL(r0, I14HANDLE);// IVG14 Handler 95 [ P0 ++ ] = R0; 96 97LD32_LABEL(r0, I15HANDLE);// IVG15 Handler 98 [ P0 ++ ] = R0; 99 100LD32(p0, EVT_OVERRIDE); 101 R0 = 0; 102 [ P0 ++ ] = R0; 103 R0 = -1; // Change this to mask interrupts (*) 104 [ P0 ] = R0; // IMASK 105CSYNC; 106 107DUMMY: 108 109 R0 = 0 (Z); 110 111LT0 = r0; // set loop counters to something deterministic 112LB0 = r0; 113LC0 = r0; 114LT1 = r0; 115LB1 = r0; 116LC1 = r0; 117 118ASTAT = r0; // reset other internal regs 119 120// The following code sets up the test for running in USER mode 121 122LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a 123 // ReturnFromInterrupt (RTI) 124RETI = r0; // We need to load the return address 125 126// Comment the following line for a USER Mode test 127 128JUMP STARTSUP; // jump to code start for SUPERVISOR mode 129 130RTI; 131 132STARTSUP: 133LD32_LABEL(p1, BEGIN); 134 135LD32(p0, EVT15); 136 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 137 138RAISE 15; // after we RTI, INT 15 should be taken,& return to BEGIN in 139 // SUPERVISOR MODE & go to different RAISE in supervisor mode 140 // until the end of the test. 141 142NOP; // Workaround for Bug 217 143RTI; 144 145// 146// The Main Program 147// 148STARTUSER: 149LD32_LABEL(sp, USTACK); // setup the stack pointer 150FP = SP; // set frame pointer 151JUMP BEGIN; 152 153//********************************************************************* 154 155BEGIN: 156 157 // COMMENT the following line for USER MODE tests 158 [ -- SP ] = RETI; // enable interrupts in supervisor mode 159 160 // **** YOUR CODE GOES HERE **** 161 162 163 164 // PUT YOUR TEST HERE! 165// PUSH 166 R0 = 0x01; 167 R1 = 0x02; 168 R2 = 0x03; 169 R3 = 0x04; 170 R4 = 0x05; 171 R5 = 0x06; 172 R6 = 0x07; 173 R7 = 0x08; 174LD32(p1, 0x12345678); 175LD32(p2, 0x05612496); 176LD32(p3, 0xab5fd490); 177LD32(p4, 0xa581bd94); 178 179 180 [ -- SP ] = ( R7:0 ); 181// RAISE 2; // RTN 182JUMP.S LABEL1; 183 P1 = R1; 184 R2 = P1; 185 [ -- SP ] = ( R7:0 ); 186 R1 = 0x12; 187 R2 = 0x13; 188 R3 = 0x14; 189 R4 = 0x15; 190 R5 = 0x16; 191 R6 = 0x17; 192 R7 = 0x18; 193 194LABEL1: 195// RAISE 5; // RTI 196 P2 = R2; 197 R3 = P2; 198 199 [ -- SP ] = ( R7:0 ); 200 201 R2 = 0x23; 202 R3 = 0x24; 203 R4 = 0x25; 204 R5 = 0x26; 205 R6 = 0x27; 206 R7 = 0x28; 207 208// RAISE 6; // RTI 209JUMP.S LABEL2; 210 P3 = R3; 211 R4 = P3; 212 [ -- SP ] = ( R7:0 ); 213// POP 214 R0 = 0x00; 215 R1 = 0x00; 216 R2 = 0x00; 217 R3 = 0x00; 218 R4 = 0x00; 219 R5 = 0x00; 220 R6 = 0x00; 221 R7 = 0x00; 222 223LABEL2: 224// RAISE 7; // RTI 225 P4 = R4; 226 R5 = P4; 227 ( R7:0 ) = [ SP ++ ]; 228 229 230 231CHECKREG(r0, 0x00000001); 232CHECKREG(r1, 0x00000002); 233CHECKREG(r2, 0x00000003); 234CHECKREG(r3, 0x00000003); 235CHECKREG(r4, 0x00000005); 236CHECKREG(r5, 0x00000006); 237CHECKREG(r6, 0x00000007); 238CHECKREG(r7, 0x00000008); 239 240// RAISE 8; // RTI 241JUMP.S LABEL3; 242 P1 = R5; 243 R6 = P1; 244 ( R7:0 ) = [ SP ++ ]; 245//CHECKREG(r0, 0x000000a1); // CHECKREG can not be skipped 246//CHECKREG(r1, 0x000000b2); // so they cannot appear here 247//CHECKREG(r2, 0x000000c3); 248//CHECKREG(r3, 0x000000d4); 249//CHECKREG(r4, 0x000000e5); 250//CHECKREG(r5, 0x000000f6); 251//CHECKREG(r6, 0x00000017); 252//CHECKREG(r7, 0x00000028); 253 R0 = 12; 254 R1 = 13; 255 R2 = 14; 256 R3 = 15; 257 R4 = 16; 258 R5 = 17; 259 R6 = 18; 260 R7 = 19; 261 262 263LABEL3: 264// RAISE 9; // RTI 265 P2 = R6; 266 R7 = P2; 267 ( R7:0 ) = [ SP ++ ]; 268 269CHECKREG(r0, 0x00000001); 270CHECKREG(r1, 0x00000002); 271CHECKREG(r2, 0x00000003); 272CHECKREG(r3, 0x00000004); 273CHECKREG(r4, 0x00000005); 274CHECKREG(r5, 0x00000006); 275CHECKREG(r6, 0x00000007); 276CHECKREG(r7, 0x00000008); 277R0 = I0; 278R1 = I1; 279R2 = I2; 280R3 = I3; 281CHECKREG(r0, 0x00000000); 282CHECKREG(r1, 0x00000000); 283CHECKREG(r2, 0x00000000); 284CHECKREG(r3, 0x00000000); 285 286 287END: 288dbg_pass; // End the test 289 290//********************************************************************* 291 292// 293// Handlers for Events 294// 295 296EHANDLE: // Emulation Handler 0 297RTE; 298 299RHANDLE: // Reset Handler 1 300RTI; 301 302NHANDLE: // NMI Handler 2 303 I0 += 2; 304RTN; 305 306XHANDLE: // Exception Handler 3 307 R1 = 3; 308RTX; 309 310HWHANDLE: // HW Error Handler 5 311 I1 += 2; 312RTI; 313 314THANDLE: // Timer Handler 6 315 I2 += 2; 316RTI; 317 318I7HANDLE: // IVG 7 Handler 319 I3 += 2; 320RTI; 321 322I8HANDLE: // IVG 8 Handler 323 I0 += 2; 324RTI; 325 326I9HANDLE: // IVG 9 Handler 327 I0 += 2; 328RTI; 329 330I10HANDLE: // IVG 10 Handler 331 R7 = 10; 332RTI; 333 334I11HANDLE: // IVG 11 Handler 335 I0 = R0; 336 I1 = R1; 337 I2 = R2; 338 I3 = R3; 339 M0 = R4; 340 R0 = 11; 341RTI; 342 343I12HANDLE: // IVG 12 Handler 344 R1 = 12; 345RTI; 346 347I13HANDLE: // IVG 13 Handler 348 R2 = 13; 349RTI; 350 351I14HANDLE: // IVG 14 Handler 352 R3 = 14; 353RTI; 354 355I15HANDLE: // IVG 15 Handler 356 R4 = 15; 357RTI; 358 359NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug 360 361// 362// Data Segment 363// 364 365.data 366DATA: 367 .space (0x10); 368 369// Stack Segments (Both Kernel and User) 370 371 .space (STACKSIZE); 372KSTACK: 373 374 .space (STACKSIZE); 375USTACK: 376