1//Original:/proj/frio/dv/testcases/core/c_seq_ex2_raise_mmr_mvpop/c_seq_ex2_raise_mmr_mvpop.dsp
2// Spec Reference: sequencer stage ex2  (raise+  mmr + regmv + pushpopmultiple)
3# mach: bfin
4# sim: --environment operating
5
6#include "test.h"
7.include "testutils.inc"
8start
9
10include(std.inc)
11include(selfcheck.inc)
12include(gen_int.inc)
13INIT_R_REGS(0);
14INIT_P_REGS(0);
15INIT_I_REGS(0);     // initialize the dsp address regs
16INIT_M_REGS(0);
17INIT_L_REGS(0);
18INIT_B_REGS(0);
19//CHECK_INIT(p5, 0xe0000000);
20include(symtable.inc)
21CHECK_INIT_DEF(p5);
22
23#ifndef STACKSIZE
24#define STACKSIZE 0x10
25#endif
26#ifndef EVT
27#define EVT  0xFFE02000
28#endif
29#ifndef EVT15
30#define EVT15  0xFFE0203C
31#endif
32#ifndef EVT_OVERRIDE
33#define EVT_OVERRIDE 0xFFE02100
34#endif
35#ifndef ITABLE
36#define ITABLE DATA_ADDR_1
37#endif
38
39GEN_INT_INIT(ITABLE) // set location for interrupt table
40
41//
42// Reset/Bootstrap Code
43//   (Here we should set the processor operating modes, initialize registers,
44//
45
46BOOT:
47
48                              // in reset mode now
49LD32_LABEL(sp, KSTACK);   // setup the stack pointer
50FP = SP;        // and frame pointer
51
52LD32(p0, EVT);      // Setup Event Vectors and Handlers
53LD32_LABEL(r0, EHANDLE);  // Emulation Handler (Int0)
54    [ P0 ++ ] = R0;
55
56LD32_LABEL(r0, RHANDLE);  // Reset Handler (Int1)
57    [ P0 ++ ] = R0;
58
59LD32_LABEL(r0, NHANDLE);  // NMI Handler (Int2)
60    [ P0 ++ ] = R0;
61
62LD32_LABEL(r0, XHANDLE);  // Exception Handler (Int3)
63    [ P0 ++ ] = R0;
64
65    [ P0 ++ ] = R0;        // IVT4 not used
66
67LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
68    [ P0 ++ ] = R0;
69
70LD32_LABEL(r0, THANDLE);  // Timer Handler (Int6)
71    [ P0 ++ ] = R0;
72
73LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
74    [ P0 ++ ] = R0;
75
76LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
77    [ P0 ++ ] = R0;
78
79LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
80    [ P0 ++ ] = R0;
81
82LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
83    [ P0 ++ ] = R0;
84
85LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
86    [ P0 ++ ] = R0;
87
88LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
89    [ P0 ++ ] = R0;
90
91LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
92    [ P0 ++ ] = R0;
93
94LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
95    [ P0 ++ ] = R0;
96
97LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
98    [ P0 ++ ] = R0;
99
100LD32(p0, EVT_OVERRIDE);
101    R0 = 0;
102    [ P0 ++ ] = R0;
103    R0 = -1;     // Change this to mask interrupts (*)
104    [ P0 ] = R0;   // IMASK
105CSYNC;
106
107DUMMY:
108
109    R0 = 0 (Z);
110
111LT0 = r0;       // set loop counters to something deterministic
112LB0 = r0;
113LC0 = r0;
114LT1 = r0;
115LB1 = r0;
116LC1 = r0;
117
118ASTAT = r0;     // reset other internal regs
119
120// The following code sets up the test for running in USER mode
121
122LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
123                        // ReturnFromInterrupt (RTI)
124RETI = r0;      // We need to load the return address
125
126// Comment the following line for a USER Mode test
127
128JUMP    STARTSUP;   // jump to code start for SUPERVISOR mode
129
130RTI;
131
132STARTSUP:
133LD32_LABEL(p1, BEGIN);
134
135LD32(p0, EVT15);
136    [ P0 ] = P1;   // IVG15 (General) handler (Int 15) load with start
137
138RAISE 15;   // after we RTI, INT 15 should be taken,& return to BEGIN in
139                // SUPERVISOR MODE & go to different RAISE in supervisor mode
140                // until the end of the test.
141
142NOP;    // Workaround for Bug 217
143RTI;
144
145//
146// The Main Program
147//
148STARTUSER:
149LD32_LABEL(sp, USTACK);   // setup the stack pointer
150FP = SP;            // set frame pointer
151JUMP BEGIN;
152
153//*********************************************************************
154
155BEGIN:
156
157                // COMMENT the following line for USER MODE tests
158    [ -- SP ] = RETI;  // enable interrupts in supervisor mode
159
160                // **** YOUR CODE GOES HERE ****
161
162
163
164    // PUT YOUR TEST HERE!
165// PUSH
166        R0 = 0x01;
167        R1 = 0x02;
168        R2 = 0x03;
169        R3 = 0x04;
170        R4 = 0x05;
171        R5 = 0x06;
172        R6 = 0x07;
173        R7 = 0x08;
174LD32(p1, 0x12345678);
175LD32(p2, 0x05612496);
176LD32(p3, 0xab5fd490);
177LD32(p4, 0xa581bd94);
178
179
180//      [--sp] = (r7-r0);
181LD32(p1, 0xFFE02034);       // wrt-rd     EVT13             = 0xFFE02034
182LD32(r0, 0x55552345);
183RAISE 2;    // RTN
184    [ P1 ] = R0;
185//  jump LABEL1;
186    P1 = R1;
187    R2 = P1;
188        [ -- SP ] = ( R7:0 );
189        R1 = 0x12;
190        R2 = 0x13;
191        R3 = 0x14;
192        R4 = 0x15;
193        R5 = 0x16;
194        R6 = 0x17;
195        R7 = 0x18;
196
197LABEL1:
198RAISE 5;    // RTI
199    P2 = R2;
200    R3 = P2;
201
202        [ -- SP ] = ( R7:0 );
203
204        R2 = 0x23;
205        R3 = 0x24;
206        R4 = 0x25;
207        R5 = 0x26;
208        R6 = 0x27;
209        R7 = 0x28;
210CSYNC;
211// wrt-rd     EVT5              = 0xFFE02034
212LD32(p1, 0xFFE02034);       // wrt-rd     EVT13             = 0xFFE02034
213RAISE 6;    // RTI
214    R0 = [ P1 ];
215//  jump LABEL2;
216    P3 = R3;
217    R4 = P3;
218        [ -- SP ] = ( R7:0 );
219// POP
220        R0 = 0x00;
221        R1 = 0x00;
222        R2 = 0x00;
223        R3 = 0x00;
224        R4 = 0x00;
225        R5 = 0x00;
226        R6 = 0x00;
227        R7 = 0x00;
228
229LABEL2:
230RAISE 7;    // RTI
231    P4 = R4;
232    R5 = P4;
233        ( R7:0 ) = [ SP ++ ];
234
235
236
237CHECKREG(r0, 0x55552345);
238CHECKREG(r1, 0x00000012);
239CHECKREG(r2, 0x00000023);
240CHECKREG(r3, 0x00000024);
241CHECKREG(r4, 0x00000024);
242CHECKREG(r5, 0x00000026);
243CHECKREG(r6, 0x00000027);
244CHECKREG(r7, 0x00000028);
245// wrt-rd     EVT13             = 0xFFE02034
246LD32(p1, 0xFFE02034);
247RAISE 8;    // RTI
248    R0 = [ P1 ];
249//  jump LABEL3;
250    P1 = R5;
251    R6 = P1;
252        ( R7:0 ) = [ SP ++ ];
253CSYNC;
254CHECKREG(r0, 0x55552345);  // CHECKREG can not be skipped
255CHECKREG(r1, 0x00000012);  // so they cannot appear here
256CHECKREG(r2, 0x00000013);
257CHECKREG(r3, 0x00000013);
258CHECKREG(r4, 0x00000015);
259CHECKREG(r5, 0x00000016);
260CHECKREG(r6, 0x00000017);
261CHECKREG(r7, 0x00000018);
262   R0 = 12;
263   R1 = 13;
264   R2 = 14;
265   R3 = 15;
266   R4 = 16;
267   R5 = 17;
268   R6 = 18;
269   R7 = 19;
270
271
272LABEL3:
273//CHECKREG(r0, 0x55552345);
274RAISE 9;    // RTI
275    P2 = R6;
276    R7 = P2;
277        ( R7:0 ) = [ SP ++ ];
278
279CHECKREG(r0, 0x55552345);
280CHECKREG(r1, 0x00000002);
281CHECKREG(r2, 0x00000002);
282CHECKREG(r3, 0x00000004);
283CHECKREG(r4, 0x00000005);
284CHECKREG(r5, 0x00000006);
285CHECKREG(r6, 0x00000007);
286CHECKREG(r7, 0x00000008);
287R0 = I0;
288R1 = I1;
289R2 = I2;
290R3 = I3;
291CHECKREG(r0, 0x00000006);
292CHECKREG(r1, 0x00000002);
293CHECKREG(r2, 0x00000002);
294CHECKREG(r3, 0x00000002);
295
296
297END:
298dbg_pass;            // End the test
299
300//*********************************************************************
301
302//
303// Handlers for Events
304//
305
306EHANDLE:            // Emulation Handler 0
307RTE;
308
309RHANDLE:            // Reset Handler 1
310RTI;
311
312NHANDLE:            // NMI Handler 2
313    I0 += 2;
314RTN;
315
316XHANDLE:            // Exception Handler 3
317    R1 = 3;
318RTX;
319
320HWHANDLE:           // HW Error Handler 5
321    I1 += 2;
322RTI;
323
324THANDLE:            // Timer Handler 6
325    I2 += 2;
326RTI;
327
328I7HANDLE:           // IVG 7 Handler
329    I3 += 2;
330RTI;
331
332I8HANDLE:           // IVG 8 Handler
333    I0 += 2;
334RTI;
335
336I9HANDLE:           // IVG 9 Handler
337    I0 += 2;
338RTI;
339
340I10HANDLE:          // IVG 10 Handler
341    R7 = 10;
342RTI;
343
344I11HANDLE:          // IVG 11 Handler
345    I0 = R0;
346    I1 = R1;
347    I2 = R2;
348    I3 = R3;
349    M0 = R4;
350    R0 = 11;
351RTI;
352
353I12HANDLE:          // IVG 12 Handler
354    R1 = 12;
355RTI;
356
357I13HANDLE:          // IVG 13 Handler
358    R2 = 13;
359RTI;
360
361I14HANDLE:          // IVG 14 Handler
362    R3 = 14;
363RTI;
364
365I15HANDLE:          // IVG 15 Handler
366    R4 = 15;
367RTI;
368
369NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug
370
371//
372// Data Segment
373//
374
375.data
376DATA:
377    .space (0x10);
378
379// Stack Segments (Both Kernel and User)
380
381    .space (STACKSIZE);
382KSTACK:
383
384    .space (STACKSIZE);
385USTACK:
386