1//Original:/proj/frio/dv/testcases/debug/dbg_tr_basic/dbg_tr_basic.dsp
2// Description: Verify the basic functionality of TBUFPWR and TBUFEN in
3//              Supervisor mode
4# mach: bfin
5# sim: --environment operating
6
7#include "test.h"
8.include "testutils.inc"
9start
10
11include(std.inc)
12include(mmrs.inc)
13include(selfcheck.inc)
14
15#ifndef ITABLE
16#define ITABLE           0xF0000000
17#endif
18
19// This test embeds .text offsets, so pad our test so it lines up.
20.space 0x70
21
22// Boot code
23
24 BOOT :
25INIT_R_REGS(0);                             // Initialize Dregs
26INIT_P_REGS(0);                             // Initialize Pregs
27
28CHECK_INIT(p5,   0x00BFFFFC);
29
30LD32(p0, EVT0);              // Setup Event Vectors and Handlers
31
32LD32_LABEL(r0, EHANDLE);    // Emulation Handler (Int0)
33        [ P0 ++ ] = R0;
34
35LD32_LABEL(r0, RHANDLE);    // Reset Handler (Int1)
36        [ P0 ++ ] = R0;
37
38LD32_LABEL(r0, NHANDLE);    // NMI Handler (Int2)
39        [ P0 ++ ] = R0;
40
41LD32_LABEL(r0, XHANDLE);    // Exception Handler (Int3)
42        [ P0 ++ ] = R0;
43
44        [ P0 ++ ] = R0;                // IVT4 not used
45
46LD32_LABEL(r0, HWHANDLE);   // HW Error Handler (Int5)
47        [ P0 ++ ] = R0;
48
49LD32_LABEL(r0, THANDLE);    // Timer Handler (Int6)
50        [ P0 ++ ] = R0;
51
52LD32_LABEL(r0, I7HANDLE);   // IVG7 Handler
53        [ P0 ++ ] = R0;
54
55LD32_LABEL(r0, I8HANDLE);   // IVG8 Handler
56        [ P0 ++ ] = R0;
57
58LD32_LABEL(r0, I9HANDLE);   // IVG9 Handler
59        [ P0 ++ ] = R0;
60
61LD32_LABEL(r0, I10HANDLE);  // IVG10 Handler
62        [ P0 ++ ] = R0;
63
64LD32_LABEL(r0, I11HANDLE);  // IVG11 Handler
65        [ P0 ++ ] = R0;
66
67LD32_LABEL(r0, I12HANDLE);  // IVG12 Handler
68        [ P0 ++ ] = R0;
69
70LD32_LABEL(r0, I13HANDLE);  // IVG13 Handler
71        [ P0 ++ ] = R0;
72
73LD32_LABEL(r0, I14HANDLE);  // IVG14 Handler
74        [ P0 ++ ] = R0;
75
76LD32_LABEL(r0, I15HANDLE);  // IVG15 Handler
77        [ P0 ++ ] = R0;
78
79LD32(p0, EVT_OVERRIDE);
80        R0 = 0;
81        [ P0 ++ ] = R0;
82        R0 = -1;     // Change this to mask interrupts (*)
83        [ P0 ] = R0;   // IMASK
84
85LD32_LABEL(p1, START);
86
87LD32(p0, EVT15);
88        [ P0 ] = P1;   // IVG15 (General) handler (Int 15) load with start
89
90LD32_LABEL(r7, DUMMY);
91RETI = r7;
92RAISE 15;    // after we RTI, INT 15 should be taken
93
94NOP;        // Workaround for Bug 217
95RTI;
96NOP;
97NOP;
98NOP;
99DUMMY:
100	  NOP;
101NOP;
102NOP;
103NOP;
104
105
106
107 START :
108WR_MMR(TBUFCTL, 0x00000000, p0, r0);        // Turn ON trace Buffer
109                                                    //   TBUFPWR   = 0
110                                                    //   TBUFEN    = 0
111                                                    //   TBUFOVF   = 0
112                                                    //   CMPLP     = 0
113NOP;
114NOP;
115NOP;
116NOP;
117NOP;
118	    NOP;
119NOP;
120JUMP.S label1;								//
121        R4.L = 0x1111;                             // Will be killed
122        R4.H = 0x1111;                             // Will be killed
123NOP;
124NOP;
125NOP;
126label2: R5.H = 0x7777;		//
127        R5.L = 0x7888;
128JUMP.S label3;		//
129        R6.L = 0x1111;                             // Will be killed
130        R6.H = 0x1111;                             // Will be killed
131NOP;
132NOP;
133NOP;
134NOP;
135NOP;
136label1: R4.H = 0x5555;		//
137        R4.L = 0x6666;
138NOP;
139WR_MMR(TBUFCTL, 0x00000002, p0, r0);        //
140                                                    //   TBUFPWR   = 0
141                                                    //   TBUFEN    = 1
142                                                    //   TBUFOVF   = 0
143                                                    //   CMPLP     = 0
144NOP;
145NOP;
146NOP;
147NOP;
148JUMP.S label2; 		//
149        R5.L = 0x1111;     // Will be killed
150        R5.H = 0x1111;     // Will be killed
151NOP;
152NOP;
153NOP;
154NOP;
155label3: R6.H = 0x7999;		//
156        R6.L = 0x7aaa;
157NOP;
158NOP;
159WR_MMR(TBUFCTL, 0x00000001, p0, r0);
160		NOP;
161		NOP;
162		NOP;
163WR_MMR(TBUFCTL, 0x00000003, p0, r0);        // Turn ON trace Buffer
164                                                    //   TBUFPWR   = 1
165                                                    //   TBUFEN    = 1
166                                                    //   TBUFOVF   = 0
167                                                    //   CMPLP     = 0
168NOP;
169NOP;
170NOP;
171NOP;
172JUMP.S label4; 		//
173        R5.L = 0x1111;     // Will be killed
174        R5.H = 0x1111;     // Will be killed
175NOP;
176NOP;
177NOP;
178NOP;
179
180label4: R6.H = 0x1aaa;		//
181        R6.L = 0x2222;
182NOP;
183NOP;
184NOP;
185NOP;
186
187WR_MMR(TBUFCTL, 0x00000001, p0, r0);        // Turn OFF trace Buffer
188
189NOP;
190NOP;
191NOP;
192NOP;
193        // Read the contents of the Trace Buffer
194
195RD_MMR(TBUFSTAT, p0, r2);
196CHECKREG(r2,    0x00000001);
197
198        // Read 3rd Entry of the Trace Buffer
199RD_MMR(TBUF,    p0,     r0);
200CHECKREG(r0,    0x000002d2);
201
202RD_MMR(TBUFSTAT, p0, r2);
203CHECKREG(r2,    0x00000001);
204
205RD_MMR(TBUF,    p0,     r1);
206CHECKREG(r1,    0x000002c0);
207
208RD_MMR(TBUFSTAT, p0, r2);
209CHECKREG(r2,    0x00000000);
210
211
212WR_MMR(TBUFCTL, 0x00000000, p0, r0);        // Turn OFF trace Buffer Power
213
214NOP;
215NOP;
216NOP;
217NOP;
218NOP;
219NOP;
220dbg_pass;        // Call Endtest Macro
221
222
223
224//*********************************************************************
225//
226// Handlers for Events
227//
228
229EHANDLE:            // Emulation Handler 0
230RTE;
231
232RHANDLE:            // Reset Handler 1
233RTI;
234
235NHANDLE:            // NMI Handler 2
236RTN;
237
238XHANDLE:            // Exception Handler 3
239RTX;
240
241HWHANDLE:           // HW Error Handler 5
242RTI;
243
244THANDLE:            // Timer Handler 6
245RTI;
246
247I7HANDLE:           // IVG 7 Handler
248RTI;
249
250I8HANDLE:           // IVG 8 Handler
251RTI;
252
253I9HANDLE:           // IVG 9 Handler
254RTI;
255
256I10HANDLE:          // IVG 10 Handler
257RTI;
258
259I11HANDLE:          // IVG 11 Handler
260RTI;
261
262I12HANDLE:          // IVG 12 Handler
263RTI;
264
265I13HANDLE:          // IVG 13 Handler
266RTI;
267
268I14HANDLE:          // IVG 14 Handler
269RTI;
270
271I15HANDLE:          // IVG 15 Handler
272RTI;
273