1/* SHIFT test program. 2 * Test r0, r1, A0 >>= BITMUX; 3 */ 4# mach: bfin 5 6.include "testutils.inc" 7 start 8 9 init_r_regs 0; 10 ASTAT = r0; 11 12// load r0=0x80000009 13// load r1=0x10000009 14// load r2=0x0000000f 15// load r3=0x00000000 16// load r4=0x80000008 17// load r5=0x00000000 18 loadsym P0, data0; 19 loadsym P1, data0; 20 R0 = [ P0 ++ ]; 21 R1 = [ P0 ++ ]; 22 R2 = [ P0 ++ ]; 23 R3 = [ P0 ++ ]; 24 R4 = [ P0 ++ ]; 25 R5 = [ P0 ++ ]; 26 27// insert two bits, both equal to 1 28// A0: 00 0000 000f -> c0 0000 0003 29// r0: 8000 0009 -> 4000 0004 30// r1: 1000 0009 -> 0800 0004 31 R0 = [ P1 + 0 ]; 32 R1 = [ P1 + 4 ]; 33 A0.w = R2; 34 A0.x = R3.L; 35 BITMUX( R0 , R1, A0) (ASR); 36 R6 = A0.w; 37 R7.L = A0.x; 38 DBGA ( R6.L , 0x0003 ); 39 DBGA ( R6.H , 0x0000 ); 40 DBGA ( R7.L , 0xffc0 ); 41 DBGA ( R0.L , 0x0004 ); 42 DBGA ( R0.H , 0x4000 ); 43 DBGA ( R1.L , 0x0004 ); 44 DBGA ( R1.H , 0x0800 ); 45 46// insert two bits, one equal to 1, other to 0 47// A0: 00 0000 000f -> 40 0000 0003 48// r0: 8000 0009 -> 4000 0004 49// r4: 8000 0008 -> 4000 0004 50 R0 = [ P1 + 0 ]; 51 R4 = [ P1 + 16 ]; 52 A0.w = R2; 53 A0.x = R3.L; 54 BITMUX( R0 , R4, A0) (ASR); 55 R6 = A0.w; 56 R7.L = A0.x; 57 DBGA ( R6.L , 0x0003 ); 58 DBGA ( R6.H , 0x0000 ); 59 DBGA ( R7.L , 0x0040 ); 60 DBGA ( R0.L , 0x0004 ); 61 DBGA ( R0.H , 0x4000 ); 62 DBGA ( R4.L , 0x0004 ); 63 DBGA ( R4.H , 0x4000 ); 64 65 pass 66 67 .data 68data0: 69 .dw 0x0009 70 .dw 0x8000 71 72 .dw 0x0009 73 .dw 0x1000 74 75 .dw 0x000f 76 .dw 0x0000 77 78 .dw 0x0000 79 .dw 0x0000 80 81 .dw 0x0008 82 .dw 0x8000 83 84 .dw 0x0000 85 .dw 0x0000 86