1# Test logical left shift (vector) insns with larger shift values
2# mach: bfin
3#include "test.h"
4.include "testutils.inc"
5
6	start
7
8	dmm32 ASTAT, (0x30400e90 | _VS | _AV0S | _AC1 | _AQ | _AN);
9	imm32 R5, 0xb0b40000;
10	imm32 R6, 0xf43a5d3c;
11	R6 = R5 << 0x19 (V, S);
12	checkreg R6, 0xff610000;
13	checkreg ASTAT, (0x30400e90 | _VS | _AV0S | _AC1 | _AQ | _AN | _AZ);
14
15	dmm32 ASTAT, (0x34104410 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AN);
16	imm32 R2, 0xff2abd08;
17	imm32 R5, 0xf610ffff;
18	R2 = R5 << 0x11 (V, S);
19	checkreg R2, 0xffffffff;
20	checkreg ASTAT, (0x34104410 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AN);
21
22	dmm32 ASTAT, (0x6cd0c680 | _VS | _V | _AV0S | _AC1 | _AC0 | _AQ | _V_COPY | _AC0_COPY | _AN);
23	imm32 R0, 0x760ecf8e;
24	imm32 R1, 0x3f5c8af5;
25	R0 = R1 << 0x17 (V, S);
26	checkreg R0, 0x001fffc5;
27	checkreg ASTAT, (0x6cd0c680 | _VS | _AV0S | _AC1 | _AC0 | _AQ | _AC0_COPY | _AN);
28
29	dmm32 ASTAT, (0x44a04280 | _AV1S | _AV1 | _AC1 | _AC0 | _CC);
30	imm32 R4, 0x520cb3d4;
31	imm32 R6, 0x67141e28;
32	R6 = R4 << 0x14 (V, S);
33	checkreg R6, 0x0005fffb;
34	checkreg ASTAT, (0x44a04280 | _AV1S | _AV1 | _AC1 | _AC0 | _CC | _AN);
35
36	dmm32 ASTAT, (0x14600c10 | _VS | _AV1S | _AC1 | _AC0 | _AN);
37	imm32 R3, 0x40407f7e;
38	imm32 R4, 0xc081e040;
39	R3 = R4 << 0x1a (V, S);
40	checkreg R3, 0xff02ff81;
41	checkreg ASTAT, (0x14600c10 | _VS | _AV1S | _AC1 | _AC0 | _AN);
42
43	dmm32 ASTAT, (0x04f00490 | _VS | _V | _AV0S | _AC1 | _AQ | _V_COPY);
44	imm32 R5, 0x63654235;
45	imm32 R7, 0x00008000;
46	R5 = R7 << 0x18 (V, S);
47	checkreg R5, 0x0000ff80;
48	checkreg ASTAT, (0x04f00490 | _VS | _AV0S | _AC1 | _AQ | _AN | _AZ);
49
50	dmm32 ASTAT, (0x3830ca90 | _VS | _V | _AV1S | _AV0S | _AC1 | _CC | _V_COPY | _AN);
51	imm32 R1, 0x40000000;
52	imm32 R2, 0x7fffffff;
53	R1 = R2 << 0x16 (V, S);
54	checkreg R1, 0x001fffff;
55	checkreg ASTAT, (0x3830ca90 | _VS | _AV1S | _AV0S | _AC1 | _CC | _AN);
56
57	dmm32 ASTAT, (0x24e08890 | _VS | _AV0S | _AC1 | _CC | _AN | _AZ);
58	imm32 R2, 0xfffe0000;
59	imm32 R3, 0xd9d90000;
60	R2 = R3 << 0x19 (V, S);
61	checkreg R2, 0xffb30000;
62	checkreg ASTAT, (0x24e08890 | _VS | _AV0S | _AC1 | _CC | _AN | _AZ);
63
64	dmm32 ASTAT, (0x30f0c200 | _VS | _AV1S | _AQ | _CC | _AC0_COPY | _AZ);
65	imm32 R0, 0x32590000;
66	imm32 R2, 0x708bb53f;
67	R0 = R2 << 0x1c (V, S);
68	checkreg R0, 0x0708fb53;
69	checkreg ASTAT, (0x30f0c200 | _VS | _AV1S | _AQ | _CC | _AC0_COPY | _AN);
70
71	dmm32 ASTAT, (0x4cc00080 | _VS | _V | _AC1 | _AQ | _V_COPY | _AC0_COPY | _AN);
72	imm32 R3, 0x3563cfa3;
73	imm32 R7, 0x027e2255;
74	R7 = R3 << 0x1f (V, S);
75	checkreg R7, 0x1ab1e7d1;
76	checkreg ASTAT, (0x4cc00080 | _VS | _AC1 | _AQ | _AC0_COPY | _AN);
77
78	pass
79