1 /* -*- tab-width: 4 -*- 2 * 3 * Electric(tm) VLSI Design System 4 * 5 * File: tectable.c 6 * Technology tables 7 * Written by: Steven M. Rubin, Static Free Software 8 * 9 * Copyright (c) 2000 Static Free Software. 10 * 11 * Electric(tm) is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * Electric(tm) is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with Electric(tm); see the file COPYING. If not, write to 23 * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, 24 * Boston, Mass 02111-1307, USA. 25 * 26 * Static Free Software 27 * 4119 Alpine Road 28 * Portola Valley, California 94028 29 * info@staticfreesoft.com 30 */ 31 32 #include "global.h" 33 34 #include "tecart.h" 35 extern COMCOMP art_parse; 36 extern GRAPHICS *art_layers[]; 37 extern TECH_ARCS *art_arcprotos[]; 38 extern TECH_NODES *art_nodeprotos[]; 39 extern TECH_VARIABLES art_variables[]; 40 41 extern GRAPHICS *bicmos_layers[]; 42 extern TECH_ARCS *bicmos_arcprotos[]; 43 extern TECH_NODES *bicmos_nodeprotos[]; 44 extern TECH_VARIABLES bicmos_variables[]; 45 BOOLEAN bicmos_initprocess(TECHNOLOGY*, INTBIG); 46 47 extern GRAPHICS *bipolar_layers[]; 48 extern TECH_ARCS *bipolar_arcprotos[]; 49 extern TECH_NODES *bipolar_nodeprotos[]; 50 extern TECH_VARIABLES bipolar_variables[]; 51 BOOLEAN bipolar_initprocess(TECHNOLOGY*, INTBIG); 52 53 extern GRAPHICS *cmos_layers[]; 54 extern TECH_ARCS *cmos_arcprotos[]; 55 extern TECH_NODES *cmos_nodeprotos[]; 56 extern TECH_VARIABLES cmos_variables[]; 57 BOOLEAN cmos_initprocess(TECHNOLOGY*, INTBIG); 58 59 #include "teccmosdodn.h" 60 extern GRAPHICS *dodcmosn_layers[]; 61 extern TECH_ARCS *dodcmosn_arcprotos[]; 62 extern TECH_NODES *dodcmosn_nodeprotos[]; 63 extern TECH_VARIABLES dodcmosn_variables[]; 64 65 extern GRAPHICS *efido_layers[]; 66 extern TECH_ARCS *efido_arcprotos[]; 67 extern TECH_NODES *efido_nodeprotos[]; 68 extern TECH_VARIABLES efido_variables[]; 69 BOOLEAN efido_initprocess(TECHNOLOGY*, INTBIG); 70 71 #include "tecgem.h" 72 extern GRAPHICS *gem_layers[]; 73 extern TECH_ARCS *gem_arcprotos[]; 74 extern TECH_NODES *gem_nodeprotos[]; 75 extern TECH_VARIABLES gem_variables[]; 76 77 #include "tecgen.h" 78 extern GRAPHICS *gen_layers[]; 79 extern TECH_ARCS *gen_arcprotos[]; 80 extern TECH_NODES *gen_nodeprotos[]; 81 extern TECH_VARIABLES gen_variables[]; 82 83 #include "tecmocmos.h" 84 extern COMCOMP mocmos_parse; 85 extern GRAPHICS *mocmos_layers[]; 86 extern TECH_ARCS *mocmos_arcprotos[]; 87 extern TECH_NODES *mocmos_nodeprotos[]; 88 extern TECH_VARIABLES mocmos_variables[]; 89 90 #include "tecmocmosold.h" 91 extern COMCOMP mocmosold_parse; 92 extern GRAPHICS *mocmosold_layers[]; 93 extern TECH_ARCS *mocmosold_arcprotos[]; 94 extern TECH_NODES *mocmosold_nodeprotos[]; 95 extern TECH_VARIABLES mocmosold_variables[]; 96 97 #include "tecmocmossub.h" 98 extern COMCOMP mocmossub_parse; 99 extern GRAPHICS *mocmossub_layers[]; 100 extern TECH_ARCS *mocmossub_arcprotos[]; 101 extern TECH_NODES *mocmossub_nodeprotos[]; 102 extern TECH_VARIABLES mocmossub_variables[]; 103 104 extern GRAPHICS *nmos_layers[]; 105 extern TECH_ARCS *nmos_arcprotos[]; 106 extern TECH_NODES *nmos_nodeprotos[]; 107 extern TECH_VARIABLES nmos_variables[]; 108 BOOLEAN nmos_initprocess(TECHNOLOGY*, INTBIG); 109 110 extern GRAPHICS *pcb_layers[]; 111 extern TECH_ARCS *pcb_arcprotos[]; 112 extern TECH_NODES *pcb_nodeprotos[]; 113 extern TECH_VARIABLES pcb_variables[]; 114 BOOLEAN pcb_initprocess(TECHNOLOGY*, INTBIG); 115 116 #include "tecrcmos.h" 117 extern GRAPHICS *rcmos_layers[]; 118 extern TECH_ARCS *rcmos_arcprotos[]; 119 extern TECH_NODES *rcmos_nodeprotos[]; 120 extern TECH_VARIABLES rcmos_variables[]; 121 122 #include "tecschem.h" 123 extern COMCOMP sch_parse; 124 extern GRAPHICS *sch_layers[]; 125 extern TECH_ARCS *sch_arcprotos[]; 126 extern TECH_NODES *sch_nodeprotos[]; 127 extern TECH_VARIABLES sch_variables[]; 128 129 #include "tecfpga.h" 130 extern COMCOMP fpga_parse; 131 extern GRAPHICS *fpga_layers[]; 132 extern TECH_ARCS *fpga_arcprotos[]; 133 extern TECH_NODES *fpga_nodeprotos[]; 134 extern TECH_VARIABLES fpga_variables[]; 135 136 #ifdef FORCESUNTOOLS 137 extern GRAPHICS *ziptronics_layers[]; 138 extern TECH_ARCS *ziptronics_arcprotos[]; 139 extern TECH_NODES *ziptronics_nodeprotos[]; 140 extern TECH_VARIABLES ziptronics_variables[]; 141 142 extern GRAPHICS *epic7s_layers[]; 143 extern TECH_ARCS *epic7s_arcprotos[]; 144 extern TECH_NODES *epic7s_nodeprotos[]; 145 extern TECH_VARIABLES epic7s_variables[]; 146 #endif 147 148 /* 149 * the first entry in this table MUST BE THE GENERIC TECHNOLOGY! 150 */ 151 TECHNOLOGY el_technologylist[] = 152 { 153 /* Generic */ 154 {x_("generic"), 0, 2000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 155 N_("Miscellaneous interconnect, constraint, and glyph"), /* description */ 156 0, gen_layers, 0, gen_arcprotos, 0, gen_nodeprotos, gen_variables, /* tables */ 157 gen_initprocess, gen_termprocess, 0, 0, /* control routines */ 158 gen_nodepolys, gen_nodepolys, gen_shapenodepoly, gen_shapenodepoly, gen_allnodepolys, gen_allnodepolys, 0, /* node routines */ 159 gen_shapeportpoly, /* port routine */ 160 0, 0, 0, 0, /* arc routines */ 161 NOTECHNOLOGY, NONSTANDARD|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 162 163 /* NMOS */ 164 {x_("nmos"), 0, 4000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 165 N_("n-channel MOS (from Mead & Conway)"), /* description */ 166 0, nmos_layers, 0, nmos_arcprotos, 0, nmos_nodeprotos, nmos_variables, /* tables */ 167 nmos_initprocess, 0, 0, 0, /* control routines */ 168 0, 0, 0, 0, 0, 0, 0, /* node routines */ 169 0, /* port routine */ 170 0, 0, 0, 0, /* arc routines */ 171 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 172 173 /* CMOS */ 174 {x_("cmos"), 0, 4000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 175 N_("Complementary MOS (old, N-Well, from Griswold)"), /* description */ 176 0, cmos_layers, 0, cmos_arcprotos, 0, cmos_nodeprotos, cmos_variables, /* tables */ 177 cmos_initprocess, 0, 0, 0, /* control routines */ 178 0, 0, 0, 0, 0, 0, 0, /* node routines */ 179 0, /* port routine */ 180 0, 0, 0, 0, /* arc routines */ 181 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 182 183 /* MOSIS CMOS */ 184 {x_("mocmos"), 0, 400,NONODEPROTO,NOARCPROTO,NOVARIABLE,0,&mocmos_parse,NOCLUSTER, /* info */ 185 N_("Complementary MOS (from MOSIS, 2-6 metals [4], 1-2 polys [2], flex rules [submicron])"), /* description */ 186 0, mocmos_layers, 0, mocmos_arcprotos, 0, mocmos_nodeprotos, mocmos_variables, /* tables */ 187 mocmos_initprocess, 0, mocmos_setmode, mocmos_request, /* control routines */ 188 mocmos_nodepolys, mocmos_nodeEpolys, mocmos_shapenodepoly, mocmos_shapeEnodepoly, mocmos_allnodepolys, mocmos_allnodeEpolys, 0, /* node routines */ 189 mocmos_shapeportpoly, /* port routine */ 190 0, 0, 0, 0, /* arc routines */ 191 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 192 193 /* Old MOSIS CMOS */ 194 {x_("mocmosold"), 0, 2000,NONODEPROTO,NOARCPROTO,NOVARIABLE,0,&mocmosold_parse,NOCLUSTER, /* info */ 195 N_("Complementary MOS (old, from MOSIS, P-Well, double metal)"), /* description */ 196 0, mocmosold_layers, 0, mocmosold_arcprotos, 0, mocmosold_nodeprotos, mocmosold_variables, /* tables */ 197 mocmosold_initprocess, 0, mocmosold_setmode, 0, /* control routines */ 198 0, 0, 0, 0, 0, 0, 0, /* node routines */ 199 0, /* port routine */ 200 mocmosold_arcpolys, mocmosold_shapearcpoly, mocmosold_allarcpolys, 0, /* arc routines */ 201 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 202 203 /* MOSIS CMOS Submicron */ 204 {x_("mocmossub"), 0, 400,NONODEPROTO,NOARCPROTO,NOVARIABLE,0,&mocmossub_parse,NOCLUSTER,/* info */ 205 N_("Complementary MOS (old, from MOSIS, Submicron, 2-6 metals [4], double poly)"), /* description */ 206 0, mocmossub_layers, 0, mocmossub_arcprotos, 0, mocmossub_nodeprotos, mocmossub_variables, /* tables */ 207 mocmossub_initprocess, 0, mocmossub_setmode, mocmossub_request, /* control routines */ 208 0, 0, 0, 0, 0, 0, 0, /* node routines */ 209 0, /* port routine */ 210 0, 0, 0, 0, /* arc routines */ 211 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 212 213 /* MOSIS BiCMOS */ 214 {x_("bicmos"), 0, 2000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 215 N_("Bipolar/CMOS (from MOSIS, N-Well, SCE Rules)"), /* description */ 216 0, bicmos_layers, 0, bicmos_arcprotos, 0, bicmos_nodeprotos, bicmos_variables, /* tables */ 217 bicmos_initprocess, 0, 0, 0, /* control routines */ 218 0, 0, 0, 0, 0, 0, 0, /* node routines */ 219 0, /* port routine */ 220 0, 0, 0, 0, /* arc routines */ 221 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 222 223 /* Round MOSIS CMOS */ 224 {x_("rcmos"), 0, 2000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 225 N_("Complementary MOS (round, from MOSIS, P-Well, double metal)"), /* description */ 226 0, rcmos_layers, 0, rcmos_arcprotos, 0, rcmos_nodeprotos, rcmos_variables, /* tables */ 227 rcmos_initprocess, 0, 0, 0, /* control routines */ 228 0, 0, 0, 0, 0, 0, 0, /* node routines */ 229 0, /* port routine */ 230 rcmos_arcpolys, rcmos_shapearcpoly, rcmos_allarcpolys, 0, /* arc routines */ 231 NOTECHNOLOGY, NONSTANDARD|NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 232 233 /* DOD CMOS (from Gary Lambert) */ 234 {x_("cmosdodn"), 0, 2000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 235 N_("Complementary MOS (from DOD, P-Well, double metal"), /* description */ 236 0, dodcmosn_layers, 0, dodcmosn_arcprotos, 0, dodcmosn_nodeprotos, dodcmosn_variables, /* tables */ 237 dodcmosn_initprocess, 0, 0, 0, /* control routines */ 238 0, 0, dodcmosn_shapenodepoly, 0, dodcmosn_allnodepolys, 0, 0, /* node routines */ 239 0, /* port routine */ 240 0, 0, 0, 0, /* arc routines */ 241 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 242 243 /* bipolar */ 244 {x_("bipolar"), 0, 4000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 245 N_("Bipolar (self-aligned, single poly)"), /* description */ 246 0, bipolar_layers, 0, bipolar_arcprotos, 0, bipolar_nodeprotos, bipolar_variables, /* tables */ 247 bipolar_initprocess, 0, 0, 0, /* control routines */ 248 0, 0, 0, 0, 0, 0, 0, /* node routines */ 249 0, /* port routine */ 250 0, 0, 0, 0, /* arc routines */ 251 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 252 253 /* Schematic capture */ 254 {x_("schematic"), 0, 4000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,&sch_parse,NOCLUSTER,/* info */ 255 N_("Schematic Capture"), /* description */ 256 0, sch_layers, 0, sch_arcprotos, 0, sch_nodeprotos, sch_variables, /* tables */ 257 sch_initprocess, sch_termprocess, sch_setmode, sch_request, /* control routines */ 258 sch_nodepolys, sch_nodeEpolys, sch_shapenodepoly, sch_shapeEnodepoly, sch_allnodepolys, sch_allnodeEpolys, sch_nodesizeoffset, /* node routines */ 259 sch_shapeportpoly, /* port routine */ 260 sch_arcpolys, sch_shapearcpoly, sch_allarcpolys, 0, /* arc routines */ 261 NOTECHNOLOGY, NONSTANDARD|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 262 263 /* FPGA */ 264 {x_("fpga"), 0, 2000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,&fpga_parse,NOCLUSTER, /* info */ 265 N_("FPGA Building-Blocks"), /* description */ 266 0, fpga_layers, 0, fpga_arcprotos, 0, fpga_nodeprotos, fpga_variables, /* tables */ 267 fpga_initprocess, fpga_termprocess, fpga_setmode, 0, /* control routines */ 268 fpga_nodepolys, fpga_nodeEpolys, fpga_shapenodepoly, fpga_shapeEnodepoly, fpga_allnodepolys, fpga_allnodeEpolys, 0, /* node routines */ 269 fpga_shapeportpoly, /* port routine */ 270 fpga_arcpolys, fpga_shapearcpoly, fpga_allarcpolys, 0, /* arc routines */ 271 NOTECHNOLOGY, NONSTANDARD|STATICTECHNOLOGY|NOPRIMTECHNOLOGY, 0, 0}, /* miscellaneous */ 272 273 /* Printed Circuit Board */ 274 {x_("pcb"), 0, 2540000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 275 N_("Printed Circuit Board (eight-layer)"), /* description */ 276 0, pcb_layers, 0, pcb_arcprotos, 0, pcb_nodeprotos, pcb_variables, /* tables */ 277 pcb_initprocess, 0, 0, 0, /* control routines */ 278 0, 0, 0, 0, 0, 0, 0, /* node routines */ 279 0, /* port routine */ 280 0, 0, 0, 0, /* arc routines */ 281 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 282 283 /* Artwork */ 284 {x_("artwork"), 0, 4000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,&art_parse,NOCLUSTER, /* info */ 285 N_("General Purpose Sketchpad Facility"), /* description */ 286 0, art_layers, 0, art_arcprotos, 0, art_nodeprotos, art_variables, /* tables */ 287 art_initprocess, 0, art_setmode, art_request, /* control routines */ 288 art_nodepolys, art_nodeEpolys, art_shapenodepoly, art_shapeEnodepoly, art_allnodepolys, art_allnodeEpolys, 0, /* node routines */ 289 art_shapeportpoly, /* port routine */ 290 art_arcpolys, art_shapearcpoly, art_allarcpolys, 0, /* arc routines */ 291 NOTECHNOLOGY, NONSTANDARD|NONELECTRICAL|NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 292 293 /* Gem Planning */ 294 {x_("gem"), 0, 2000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 295 N_("Temporal Specification Facility (from Lansky)"), /* description */ 296 0, gem_layers, 0, gem_arcprotos, 0, gem_nodeprotos, gem_variables, /* tables */ 297 gem_initprocess, 0, 0, 0, /* control routines */ 298 0, 0, gem_shapenodepoly, 0, gem_allnodepolys, 0, 0, /* node routines */ 299 0, /* port routine */ 300 0, gem_shapearcpoly, gem_allarcpolys, 0, /* arc routines */ 301 NOTECHNOLOGY, NONSTANDARD|NONELECTRICAL|NODIRECTIONALARCS|NONEGATEDARCS|STATICTECHNOLOGY, 0, 0},/* miscellaneous */ 302 303 /* Digital Filter */ 304 {x_("efido"), 0, 20000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 305 N_("Digital Filter Facility (from Kroeker)"), /* description */ 306 0, efido_layers, 0, efido_arcprotos, 0, efido_nodeprotos, efido_variables, /* tables */ 307 efido_initprocess, 0, 0, 0, /* control routines */ 308 0, 0, 0, 0, 0, 0, 0, /* node routines */ 309 0, /* port routine */ 310 0, 0, 0, 0, /* arc routines */ 311 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 312 313 #ifdef FORCESUNTOOLS 314 {x_("ziptronics"), 0, 2000, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 315 N_("Ziptronics Metal Layers with Micron SRAM Wafer"), /* description */ 316 0, ziptronics_layers, 0, ziptronics_arcprotos, 0, ziptronics_nodeprotos, ziptronics_variables, /* tables */ 317 0, 0, 0, 0, /* control routines */ 318 0, 0, 0, 0, 0, 0, 0, /* node routines */ 319 0, /* port routine */ 320 0, 0, 0, 0, /* arc routines */ 321 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 322 323 {x_("epic7s"), 0, 40, NONODEPROTO,NOARCPROTO,NOVARIABLE,0,NOCOMCOMP,NOCLUSTER, /* info */ 324 N_("Epic7S from Texas Instruments (90nm, 9 metal, 1 poly)"), /* description */ 325 0, epic7s_layers, 0, epic7s_arcprotos, 0, epic7s_nodeprotos, epic7s_variables, /* tables */ 326 0, 0, 0, 0, /* control routines */ 327 0, 0, 0, 0, 0, 0, 0, /* node routines */ 328 0, /* port routine */ 329 0, 0, 0, 0, /* arc routines */ 330 NOTECHNOLOGY, NONEGATEDARCS|STATICTECHNOLOGY, 0, 0}, /* miscellaneous */ 331 #endif 332 333 /* termination */ 334 {NULL, 0, 0, NULL, NULL, NULL, 0, NULL, NULL, /* info */ 335 NULL, /* description */ 336 0, NULL, 0, NULL, 0, NULL, NULL, /* tables */ 337 0, 0, 0, 0, /* control routines */ 338 0, 0, 0, 0, 0, 0, 0, /* node routines */ 339 0, /* port routine */ 340 0, 0, 0, 0, /* arc routines */ 341 NOTECHNOLOGY, 0, 0, 0} /* miscellaneous */ 342 }; 343