xref: /netbsd/sys/dev/qbus/uda.c (revision 2d52435a)
1 /*	$NetBSD: uda.c,v 1.64 2022/05/22 11:27:35 andvar Exp $	*/
2 /*
3  * Copyright (c) 1988 Regents of the University of California.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * Chris Torek.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. Neither the name of the University nor the names of its contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  *	@(#)uda.c	7.32 (Berkeley) 2/13/91
34  */
35 
36 /*
37  * Copyright (c) 1996 Ludd, University of Lule}, Sweden.
38  * All rights reserved.
39  *
40  * Redistribution and use in source and binary forms, with or without
41  * modification, are permitted provided that the following conditions
42  * are met:
43  * 1. Redistributions of source code must retain the above copyright
44  *    notice, this list of conditions and the following disclaimer.
45  * 2. Redistributions in binary form must reproduce the above copyright
46  *    notice, this list of conditions and the following disclaimer in the
47  *    documentation and/or other materials provided with the distribution.
48  *
49  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
50  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
51  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
52  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
53  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
54  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
55  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
56  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
57  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
58  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
59  * SUCH DAMAGE.
60  *
61  *	@(#)uda.c	7.32 (Berkeley) 2/13/91
62  */
63 
64 /*
65  * UDA50 disk device driver
66  */
67 
68 #include <sys/cdefs.h>
69 __KERNEL_RCSID(0, "$NetBSD: uda.c,v 1.64 2022/05/22 11:27:35 andvar Exp $");
70 
71 #include <sys/param.h>
72 #include <sys/kernel.h>
73 #include <sys/systm.h>
74 #include <sys/device.h>
75 #include <sys/buf.h>
76 #include <sys/bufq.h>
77 #include <sys/malloc.h>
78 
79 #include <sys/bus.h>
80 #include <machine/sid.h>
81 
82 #include <dev/qbus/ubavar.h>
83 
84 #include <dev/mscp/mscp.h>
85 #include <dev/mscp/mscpreg.h>
86 #include <dev/mscp/mscpvar.h>
87 
88 #include "ioconf.h"
89 
90 /*
91  * Software status, per controller.
92  */
93 struct	uda_softc {
94 	device_t sc_dev;	/* Autoconfig info */
95 	struct uba_softc *sc_uh;
96 	struct	evcnt sc_intrcnt; /* Interrupt counting */
97 	struct	uba_unit sc_unit; /* Struct common for UBA to communicate */
98 	struct	ubinfo sc_ui;
99 	bus_dma_tag_t		sc_dmat;
100 	bus_space_tag_t		sc_iot;
101 	bus_space_handle_t	sc_iph;
102 	bus_space_handle_t	sc_sah;
103 	struct	mscp_softc *sc_softc;	/* MSCP info (per mscpvar.h) */
104 	int	sc_inq;
105 };
106 
107 static	int udamatch(device_t, cfdata_t, void *);
108 static	void udaattach(device_t, device_t, void *);
109 static	void udareset(device_t);
110 static	void udaintr(void *);
111 static	int udaready(struct uba_unit *);
112 static	void udactlrdone(device_t);
113 static	int udaprint(void *, const char *);
114 static	void udasaerror(device_t, int);
115 static	void udago(device_t, struct mscp_xi *);
116 
117 CFATTACH_DECL_NEW(mtc, sizeof(struct uda_softc),
118     udamatch, udaattach, NULL, NULL);
119 
120 CFATTACH_DECL_NEW(uda, sizeof(struct uda_softc),
121     udamatch, udaattach, NULL, NULL);
122 
123 /*
124  * More driver definitions, for generic MSCP code.
125  */
126 struct	mscp_ctlr uda_mscp_ctlr = {
127 	udactlrdone,
128 	udago,
129 	udasaerror,
130 };
131 
132 int
udaprint(void * aux,const char * name)133 udaprint(void *aux, const char *name)
134 {
135 	if (name)
136 		aprint_normal("%s: mscpbus", name);
137 	return UNCONF;
138 }
139 
140 /*
141  * Poke at a supposed UDA50 to see if it is there.
142  */
143 int
udamatch(device_t parent,cfdata_t cf,void * aux)144 udamatch(device_t parent, cfdata_t cf, void *aux)
145 {
146 	struct	uba_attach_args *ua = aux;
147 	struct	uba_softc *uh = device_private(parent);
148 	struct	mscp_softc mi;	/* Nice hack */
149 	int	tries;
150 
151 	/* Get an interrupt vector. */
152 
153 	mi.mi_iot = ua->ua_iot;
154 	mi.mi_iph = ua->ua_ioh;
155 	mi.mi_sah = ua->ua_ioh + 2;
156 	mi.mi_swh = ua->ua_ioh + 2;
157 
158 	/*
159 	 * Initialise the controller (partially).  The UDA50 programmer's
160 	 * manual states that if initialisation fails, it should be retried
161 	 * at least once, but after a second failure the port should be
162 	 * considered `down'; it also mentions that the controller should
163 	 * initialise within ten seconds.  Or so I hear; I have not seen
164 	 * this manual myself.
165 	 */
166 	tries = 0;
167 again:
168 
169 	bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */
170 	if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0)
171 		return 0; /* Nothing here... */
172 
173 	bus_space_write_2(mi.mi_iot, mi.mi_sah, 0,
174 	    MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE |
175 	    ((uh->uh_lastiv - 4) >> 2));
176 
177 	if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) {
178 		printf("udaprobe: init step2 no change. sa=%x\n",
179 		    bus_space_read_2(mi.mi_iot, mi.mi_sah, 0));
180 		goto bad;
181 	}
182 
183 	/* should have interrupted by now */
184 	return 1;
185 bad:
186 	if (++tries < 2)
187 		goto again;
188 	return 0;
189 }
190 
191 void
udaattach(device_t parent,device_t self,void * aux)192 udaattach(device_t parent, device_t self, void *aux)
193 {
194 	struct	uda_softc *sc = device_private(self);
195 	struct	uba_attach_args *ua = aux;
196 	struct	mscp_attach_args ma;
197 	int	error;
198 
199 	printf("\n");
200 
201 	sc->sc_dev = self;
202 	sc->sc_uh = device_private(parent);
203 
204 	sc->sc_uh->uh_lastiv -= 4;	/* remove dynamic interrupt vector */
205 
206 	uba_intr_establish(ua->ua_icookie, ua->ua_cvec,
207 		udaintr, sc, &sc->sc_intrcnt);
208 	uba_reset_establish(udareset, sc->sc_dev);
209 	evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
210 		device_xname(sc->sc_dev), "intr");
211 
212 	sc->sc_iot = ua->ua_iot;
213 	sc->sc_iph = ua->ua_ioh;
214 	sc->sc_sah = ua->ua_ioh + 2;
215 	sc->sc_dmat = ua->ua_dmat;
216 
217 	/*
218 	 * Fill in the uba_unit struct, so we can communicate with the uba.
219 	 */
220 	sc->sc_unit.uu_dev = self;	/* Backpointer to softc */
221 	sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */
222 	sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0;
223 
224 	/*
225 	 * Map the communication area and command and
226 	 * response packets into Unibus space.
227 	 */
228 	sc->sc_ui.ui_size = sizeof(struct mscp_pack);
229 	if ((error = ubmemalloc(sc->sc_uh, &sc->sc_ui, UBA_CANTWAIT)))
230 		return printf("ubmemalloc failed: %d\n", error);
231 
232 	memset(sc->sc_ui.ui_vaddr, 0, sizeof (struct mscp_pack));
233 
234 	/*
235 	 * The only thing that differ UDA's and Tape ctlr's is
236 	 * their vcid. Because there are no way to determine which
237 	 * ctlr type it is, we check what is generated and later
238 	 * set the correct vcid.
239 	 */
240 	ma.ma_type = (device_is_a(self, "mtc") ? MSCPBUS_TAPE : MSCPBUS_DISK);
241 
242 	ma.ma_mc = &uda_mscp_ctlr;
243 	ma.ma_type |= MSCPBUS_UDA;
244 	ma.ma_uda = (struct mscp_pack *)sc->sc_ui.ui_vaddr;
245 	ma.ma_softc = &sc->sc_softc;
246 	ma.ma_iot = sc->sc_iot;
247 	ma.ma_iph = sc->sc_iph;
248 	ma.ma_sah = sc->sc_sah;
249 	ma.ma_swh = sc->sc_sah;
250 	ma.ma_dmat = sc->sc_dmat;
251 	ma.ma_dmam = sc->sc_ui.ui_dmam;
252 	ma.ma_ivec = sc->sc_uh->uh_lastiv;
253 	ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1);	/* XXX */
254 	ma.ma_adapnr = sc->sc_uh->uh_nr;
255 	config_found(sc->sc_dev, &ma, udaprint, CFARGS_NONE);
256 }
257 
258 /*
259  * Start a transfer if there are free resources available, otherwise
260  * let it go in udaready, forget it for now.
261  * Called from mscp routines.
262  */
263 void
udago(device_t dv,struct mscp_xi * mxi)264 udago(device_t dv, struct mscp_xi *mxi)
265 {
266 	struct uda_softc *sc = device_private(dv);
267 	struct uba_unit *uu;
268 	struct buf *bp = mxi->mxi_bp;
269 	int err;
270 
271 	/*
272 	 * If we already have transfers queued, don't try to load
273 	 * the map again.
274 	 */
275 	if (sc->sc_inq == 0) {
276 		err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam,
277 		    bp->b_data, bp->b_bcount,
278 		    (bp->b_flags & B_PHYS ? bp->b_proc : 0), BUS_DMA_NOWAIT);
279 		if (err == 0) {
280 			mscp_dgo(sc->sc_softc, mxi);
281 			return;
282 		}
283 	}
284 	uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT|M_ZERO);
285 	if (uu == NULL)
286 		panic("udago: no mem");
287 	uu->uu_ready = udaready;
288 	uu->uu_dev = dv;
289 	uu->uu_ref = mxi;
290 	uba_enqueue(uu);
291 	sc->sc_inq++;
292 }
293 
294 /*
295  * Called if we have been blocked for resources, and resources
296  * have been freed again. Return 1 if we could start all
297  * transfers again, 0 if we still are waiting.
298  * Called from uba resource free routines.
299  */
300 int
udaready(struct uba_unit * uu)301 udaready(struct uba_unit *uu)
302 {
303 	struct uda_softc *sc = device_private(uu->uu_dev);
304 	struct mscp_xi *mxi = uu->uu_ref;
305 	struct buf *bp = mxi->mxi_bp;
306 	int err;
307 
308 	err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_data,
309 	    bp->b_bcount, (bp->b_flags & B_PHYS ? bp->b_proc : 0),
310 	    BUS_DMA_NOWAIT);
311 
312 	if (err)
313 		return 0;
314 	mscp_dgo(sc->sc_softc, mxi);
315 	sc->sc_inq--;
316 	free(uu, M_DEVBUF);
317 	return 1;
318 }
319 
320 static const struct saerr {
321 	int	code;		/* error code (including UDA_ERR) */
322 	const char	*desc;		/* what it means: Efoo => foo error */
323 } saerr[] = {
324 	{ 0100001, "Eunibus packet read" },
325 	{ 0100002, "Eunibus packet write" },
326 	{ 0100003, "EUDA ROM and RAM parity" },
327 	{ 0100004, "EUDA RAM parity" },
328 	{ 0100005, "EUDA ROM parity" },
329 	{ 0100006, "Eunibus ring read" },
330 	{ 0100007, "Eunibus ring write" },
331 	{ 0100010, " unibus interrupt master failure" },
332 	{ 0100011, "Ehost access timeout" },
333 	{ 0100012, " host exceeded command limit" },
334 	{ 0100013, " unibus bus master failure" },
335 	{ 0100014, " DM XFC fatal error" },
336 	{ 0100015, " hardware timeout of instruction loop" },
337 	{ 0100016, " invalid virtual circuit id" },
338 	{ 0100017, "Eunibus interrupt write" },
339 	{ 0104000, "Efatal sequence" },
340 	{ 0104040, " D proc ALU" },
341 	{ 0104041, "ED proc control ROM parity" },
342 	{ 0105102, "ED proc w/no BD#2 or RAM parity" },
343 	{ 0105105, "ED proc RAM buffer" },
344 	{ 0105152, "ED proc SDI" },
345 	{ 0105153, "ED proc write mode wrap serdes" },
346 	{ 0105154, "ED proc read mode serdes, RSGEN & ECC" },
347 	{ 0106040, "EU proc ALU" },
348 	{ 0106041, "EU proc control reg" },
349 	{ 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" },
350 	{ 0106047, " U proc const PROM err w/D proc running SDI test" },
351 	{ 0106055, " unexpected trap" },
352 	{ 0106071, "EU proc const PROM" },
353 	{ 0106072, "EU proc control ROM parity" },
354 	{ 0106200, "Estep 1 data" },
355 	{ 0107103, "EU proc RAM parity" },
356 	{ 0107107, "EU proc RAM buffer" },
357 	{ 0107115, " test count wrong (BD 12)" },
358 	{ 0112300, "Estep 2" },
359 	{ 0122240, "ENPR" },
360 	{ 0122300, "Estep 3" },
361 	{ 0142300, "Estep 4" },
362 	{ 0, " unknown error code" }
363 };
364 
365 /*
366  * If the error bit was set in the controller status register, gripe,
367  * then (optionally) reset the controller and requeue pending transfers.
368  */
369 void
udasaerror(device_t dev,int doreset)370 udasaerror(device_t dev, int doreset)
371 {
372 	struct	uda_softc *sc = device_private(dev);
373 	int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0);
374 	const struct saerr *e;
375 
376 	if ((code & MP_ERR) == 0)
377 		return;
378 	for (e = saerr; e->code; e++)
379 		if (e->code == code)
380 			break;
381 	aprint_error_dev(sc->sc_dev, "controller error, sa=0%o (%s%s)\n",
382 		code, e->desc + 1, *e->desc == 'E' ? " error" : "");
383 #if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */
384 	if (doreset) {
385 		mscp_requeue(sc->sc_softc);
386 /*		(void) udainit(sc);	XXX */
387 	}
388 #endif
389 }
390 
391 /*
392  * Interrupt routine.  Depending on the state of the controller,
393  * continue initialisation, or acknowledge command and response
394  * interrupts, and process responses.
395  */
396 static void
udaintr(void * arg)397 udaintr(void *arg)
398 {
399 	struct uda_softc *sc = arg;
400 
401 	/* ctlr fatal error */
402 	if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) {
403 		udasaerror(sc->sc_dev, 1);
404 		return;
405 	}
406 	/*
407 	 * Handle buffer purge requests.
408 	 * XXX - should be done in bus_dma_sync().
409 	 */
410 #ifdef notyet
411 	if (ud->mp_ca.ca_bdp) {
412 		if (sc->sc_uh->uh_ubapurge)
413 			(*sc->sc_uh->uh_ubapurge)(sc->sc_uh,
414 			    ud->mp_ca.ca_bdp);
415 		/* signal purge complete */
416 		bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0);
417 	}
418 #endif
419 
420 	mscp_intr(sc->sc_softc);
421 }
422 
423 /*
424  * A Unibus reset has occurred on UBA uban.  Reinitialise the controller(s)
425  * on that Unibus, and requeue outstanding I/O.
426  */
427 static void
udareset(device_t dev)428 udareset(device_t dev)
429 {
430 	struct uda_softc *sc = device_private(dev);
431 	/*
432 	 * Our BDP (if any) is gone; our command (if any) is
433 	 * flushed; the device is no longer mapped; and the
434 	 * UDA50 is not yet initialised.
435 	 */
436 	if (sc->sc_unit.uu_bdp) {
437 		/* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */
438 		sc->sc_unit.uu_bdp = 0;
439 	}
440 
441 	/* reset queues and requeue pending transfers */
442 	mscp_requeue(sc->sc_softc);
443 
444 	/*
445 	 * If it fails to initialise we will notice later and
446 	 * try again (and again...).  Do not call udastart()
447 	 * here; it will be done after the controller finishes
448 	 * initialisation.
449 	 */
450 /* XXX	if (udainit(sc)) */
451 		printf(" (hung)");
452 }
453 
454 void
udactlrdone(device_t dev)455 udactlrdone(device_t dev)
456 {
457 	struct uda_softc *sc = device_private(dev);
458 	int s;
459 
460 	s = spluba();
461 	uba_done(sc->sc_uh);
462 	splx(s);
463 }
464