1 /*
2  * libtilemcore - Graphing calculator emulation library
3  *
4  * Copyright (C) 2009-2011 Benjamin Moody
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public License
8  * as published by the Free Software Foundation; either version 2.1 of
9  * the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see
18  * <http://www.gnu.org/licenses/>.
19  */
20 
21 #ifndef _TILEM_XN_H
22 #define _TILEM_XN_H
23 
24 enum {
25 	PORT3,			/* mask of enabled interrupts */
26 	PORT4,			/* interrupt timer speed */
27 	PORT5,			/* memory mapping bank C */
28 	PORT6,			/* memory mapping bank A */
29 	PORT7,			/* memory mapping bank B */
30 	PORT8,			/* link assist mode flags */
31 	PORT9,			/* unknown (link assist settings?) */
32 	PORTA,			/* unknown (timeout value?) */
33 	PORTB,			/* unknown (timeout value?) */
34 	PORTC,			/* unknown (timeout value?) */
35 	PORTD,			/* unknown */
36 	PORTE,			/* unknown */
37 	PORTF,			/* unknown */
38 
39 	PORT20,			/* CPU speed control */
40 	PORT21,			/* hardware type / RAM no-exec control */
41 	PORT22,			/* Flash no-exec lower limit */
42 	PORT23,			/* Flash no-exec upper limit */
43 	PORT25,			/* unknown */
44 	PORT26,			/* unknown */
45 	PORT27,			/* bank C forced-page-0 limit */
46 	PORT28,			/* bank B forced-page-1 limit */
47 	PORT29,			/* LCD port delay (6 MHz) */
48 	PORT2A,			/* LCD port delay (mode 1) */
49 	PORT2B,			/* LCD port delay (mode 2) */
50 	PORT2C,			/* LCD port delay (mode 3) */
51 	PORT2D,			/* unknown */
52 	PORT2E,			/* memory delay */
53 	PORT2F,			/* Duration of LCD wait timer */
54 
55 	CLOCK_MODE,		/* clock mode */
56 	CLOCK_INPUT,		/* clock input register */
57 	CLOCK_DIFF,		/* clock value minus actual time */
58 
59 	RAM_READ_DELAY,
60 	RAM_WRITE_DELAY,
61 	RAM_EXEC_DELAY,
62 	FLASH_READ_DELAY,
63 	FLASH_WRITE_DELAY,
64 	FLASH_EXEC_DELAY,
65 	LCD_PORT_DELAY,
66 	NO_EXEC_RAM,
67 
68 	LCD_WAIT,		/* LCD wait timer active */
69 	PROTECTSTATE,		/* port protection state */
70 	NUM_HW_REGS
71 };
72 
73 #define HW_REG_NAMES \
74 	{ "port3", "port4", "port5", "port6", "port7", "port8", "port9", \
75 	  "portA", "portB", "portC", "portD", "portE", "portF", "port20", \
76 	  "port21", "port22", "port23", "port25", "port26", "port27", \
77 	  "port28", "port29", "port2A", "port2B", "port2C", "port2D", \
78 	  "port2E", "port2F", "clock_mode", "clock_input", "clock_diff", \
79 	  "ram_read_delay", "ram_write_delay", "ram_exec_delay", \
80 	  "flash_read_delay", "flash_write_delay", "flash_exec_delay", \
81 	  "lcd_port_delay", "no_exec_ram", "lcd_wait", "protectstate" }
82 
83 #define TIMER_INT1 (TILEM_NUM_SYS_TIMERS + 1)
84 #define TIMER_INT2A (TILEM_NUM_SYS_TIMERS + 2)
85 #define TIMER_INT2B (TILEM_NUM_SYS_TIMERS + 3)
86 #define TIMER_LCD_WAIT (TILEM_NUM_SYS_TIMERS + 4)
87 #define TIMER_FREEZE_LINK_PORT (TILEM_NUM_SYS_TIMERS + 5)
88 #define NUM_HW_TIMERS 5
89 
90 #define HW_TIMER_NAMES { "int1", "int2a", "int2b", "lcd_wait", \
91 			 "freeze_link_port" }
92 
93 void xn_reset(TilemCalc* calc);
94 void xn_stateloaded(TilemCalc* calc, int savtype);
95 byte xn_z80_in(TilemCalc* calc, dword port);
96 void xn_z80_out(TilemCalc* calc, dword port, byte value);
97 void xn_z80_instr(TilemCalc* calc, dword opcode);
98 void xn_z80_ptimer(TilemCalc* calc, int id);
99 void xn_z80_wrmem(TilemCalc* calc, dword addr, byte value);
100 byte xn_z80_rdmem(TilemCalc* calc, dword addr);
101 byte xn_z80_rdmem_m1(TilemCalc* calc, dword addr);
102 dword xn_mem_ltop(TilemCalc* calc, dword addr);
103 dword xn_mem_ptol(TilemCalc* calc, dword addr);
104 
105 #endif
106