1 /* 2 * Simulator of microcontrollers (z80mac.h) 3 * 4 * some z80 code base from Karl Bongers karl@turbobit.com 5 * 6 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. 7 * 8 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu 9 * 10 */ 11 12 #if 0 13 /* made into virtual function in z80_cl class to make integrating 14 * banking and/or memory mapped devices easier 15 * -Leland Morrison 2011-09-29 16 */ 17 18 #define store2(addr, val) { ram->write((t_addr) (addr), val & 0xff); \ 19 ram->write((t_addr) (addr+1), (val >> 8) & 0xff); } 20 #define store1(addr, val) ram->write((t_addr) (addr), val) 21 #define get1(addr) ram->read((t_addr) (addr)) 22 #define get2(addr) (ram->read((t_addr) (addr)) | (ram->read((t_addr) (addr+1)) << 8) ) 23 #define fetch2() (fetch() | (fetch() << 8)) 24 #define fetch1() fetch() 25 #endif 26 27 #define push2(val) {regs.SP-=2; store2(regs.SP,(val));} 28 #define push1(val) {regs.SP-=1; store1(regs.SP,(val));} 29 #define pop2(var) {var=get2(regs.SP),regs.SP+=2;} 30 //#define pop1(var) {var=get1(regs.SP),regs.SP+=1;} 31 #define add_u16_disp(_w, _d) (( (unsigned short)(_w) + (signed char)(_d) ) & 0xffff) 32 #define parity(val) ( ((val>>7)&1) ^ ((val>>6)&1) ^ ((val>>5)&1) ^ ((val>>4)&1) ^ ((val>>3)&1) ^ ((val>>2)&1) ^ ((val>>1)&1) ^ ((val>>0)&1) ^ 1 ) 33 34 #define add_A_bytereg(br) { \ 35 unsigned int accu = (unsigned int)regs.raf.A; \ 36 unsigned int oper = (unsigned int)(br); \ 37 signed int res = (signed char)regs.raf.A + (signed char)(br); \ 38 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 39 regs.raf.F &= ~BIT_N; /* addition */ \ 40 if ((accu & 0x0F) + (oper & 0x0F) > 0x0F) regs.raf.F |= BIT_A; \ 41 if ((res < -128) || (res > 127)) regs.raf.F |= BIT_P; \ 42 if (accu + oper > 0xFF) regs.raf.F |= BIT_C; \ 43 regs.raf.A += oper; \ 44 if (regs.raf.A == 0) regs.raf.F |= BIT_Z; \ 45 if (regs.raf.A & 0x80) regs.raf.F |= BIT_S; \ 46 } 47 48 #define adc_A_bytereg(br) { \ 49 unsigned int accu = (unsigned int)regs.raf.A; \ 50 unsigned int oper = (unsigned int)(br); \ 51 signed int res = (signed char)regs.raf.A + (signed char)(br); \ 52 if (regs.raf.F & BIT_C) { ++oper; ++res; } \ 53 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 54 regs.raf.F &= ~BIT_N; /* addition */ \ 55 if ((accu & 0x0F) + (oper & 0x0F) > 0x0F) regs.raf.F |= BIT_A; \ 56 if ((res < -128) || (res > 127)) regs.raf.F |= BIT_P; \ 57 if (accu + oper > 0xFF) regs.raf.F |= BIT_C; \ 58 regs.raf.A += oper; \ 59 if (regs.raf.A == 0) regs.raf.F |= BIT_Z; \ 60 if (regs.raf.A & 0x80) regs.raf.F |= BIT_S; \ 61 } 62 63 #define add_HL_Word(wr) { \ 64 unsigned int accu = (unsigned int)regs.HL; \ 65 unsigned int oper = (unsigned int)(wr); \ 66 regs.raf.F &= ~(BIT_A | BIT_C); /* clear these */ \ 67 regs.raf.F &= ~BIT_N; /* addition */ \ 68 if ((accu & 0x0FFF) + (oper & 0x0FFF) > 0x0FFF) regs.raf.F |= BIT_A; \ 69 if (accu + oper > 0xFFFF) regs.raf.F |= BIT_C; \ 70 regs.HL += oper; \ 71 } 72 73 #define add_IX_Word(wr) { \ 74 unsigned int accu = (unsigned int)regs_IX_OR_IY; \ 75 unsigned int oper = (unsigned int)(wr); \ 76 regs.raf.F &= ~(BIT_A | BIT_C); /* clear these */ \ 77 regs.raf.F &= ~BIT_N; /* addition */ \ 78 if ((accu & 0x0FFF) + (oper & 0x0FFF) > 0x0FFF) regs.raf.F |= BIT_A; \ 79 if (accu + oper > 0xFFFF) regs.raf.F |= BIT_C; \ 80 regs_IX_OR_IY += oper; \ 81 } 82 83 #define adc_HL_wordreg(reg) { \ 84 unsigned int accu = (unsigned int)regs.HL; \ 85 unsigned int oper = (unsigned int)(reg); \ 86 signed int res = (signed short)regs.HL + (signed short)(reg); \ 87 if (regs.raf.F & BIT_C) { ++oper; ++res; } \ 88 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 89 regs.raf.F &= ~BIT_N; /* addition */ \ 90 if ((accu & 0x0FFF) + (oper & 0x0FFF) > 0x0FFF) regs.raf.F |= BIT_A; \ 91 if ((res < -32768) || (res > 32767)) regs.raf.F |= BIT_P; \ 92 if (accu + oper > 0xFFFF) regs.raf.F |= BIT_C; \ 93 regs.HL += oper; \ 94 if (regs.HL == 0) regs.raf.F |= BIT_Z; \ 95 if (regs.HL & 0x8000) regs.raf.F |= BIT_S; \ 96 } 97 98 #define sub_A_bytereg(br) { \ 99 unsigned int accu = (unsigned int)regs.raf.A; \ 100 unsigned int oper = (unsigned int)(br); \ 101 signed int res = (signed char)regs.raf.A - (signed char)(br); \ 102 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 103 regs.raf.F |= BIT_N; /* not addition */ \ 104 if ((accu & 0x0F) < (oper & 0x0F)) regs.raf.F |= BIT_A; \ 105 if ((res < -128) || (res > 127)) regs.raf.F |= BIT_P; \ 106 if (accu < oper) regs.raf.F |= BIT_C; \ 107 regs.raf.A -= oper; \ 108 if (regs.raf.A == 0) regs.raf.F |= BIT_Z; \ 109 if (regs.raf.A & 0x80) regs.raf.F |= BIT_S; \ 110 } 111 112 #define sbc_A_bytereg(br) { \ 113 unsigned int accu = (unsigned int)regs.raf.A; \ 114 unsigned int oper = (unsigned int)(br); \ 115 signed int res = (signed char)regs.raf.A - (signed char)(br); \ 116 if (regs.raf.F & BIT_C) { ++oper; --res; } \ 117 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 118 regs.raf.F |= BIT_N; /* not addition */ \ 119 if ((accu & 0x0F) < (oper & 0x0F)) regs.raf.F |= BIT_A; \ 120 if ((res < -128) || (res > 127)) regs.raf.F |= BIT_P; \ 121 if (accu < oper) regs.raf.F |= BIT_C; \ 122 regs.raf.A -= oper; \ 123 if (regs.raf.A == 0) regs.raf.F |= BIT_Z; \ 124 if (regs.raf.A & 0x80) regs.raf.F |= BIT_S; \ 125 } 126 127 #define sbc_HL_wordreg(reg) { \ 128 unsigned int accu = (unsigned int)regs.HL; \ 129 unsigned int oper = (unsigned int)reg; \ 130 signed int res = (signed short)regs.HL - (signed short)(reg);\ 131 if (regs.raf.F & BIT_C) { ++oper; --res; } \ 132 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 133 regs.raf.F |= BIT_N; /* not addition */ \ 134 if ((accu & 0x0FFF) < (oper & 0x0FFF)) regs.raf.F |= BIT_A; \ 135 if ((res < -32768) || (res > 32767)) regs.raf.F |= BIT_P; \ 136 if (accu < oper) regs.raf.F |= BIT_C; \ 137 regs.HL -= oper; \ 138 if (regs.HL == 0) regs.raf.F |= BIT_Z; \ 139 if (regs.HL & 0x8000) regs.raf.F |= BIT_S; \ 140 } 141 142 #define cp_bytereg(br) { \ 143 unsigned int accu = (unsigned int)regs.raf.A; \ 144 unsigned int oper = (unsigned int)(br); \ 145 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 146 regs.raf.F |= BIT_N; /* not addition */ \ 147 if ((accu & 0x0F) < (oper & 0x0F)) regs.raf.F |= BIT_A; \ 148 if ((accu & 0x7F) < (oper & 0x7F)) regs.raf.F |= BIT_P; \ 149 if (accu < oper) { regs.raf.F |= BIT_C; regs.raf.F ^= BIT_P; } \ 150 accu -= oper; \ 151 if (accu == 0) regs.raf.F |= BIT_Z; \ 152 if (accu & 0x80) regs.raf.F |= BIT_S; \ 153 } 154 155 #define rr_byte(reg) { \ 156 if (regs.raf.F & BIT_C) { \ 157 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 158 if (reg & 0x01) \ 159 regs.raf.F |= BIT_C; \ 160 reg = (reg >> 1) | 0x80; \ 161 } else { \ 162 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 163 if (reg & 0x01) \ 164 regs.raf.F |= BIT_C; \ 165 reg = (reg >> 1); \ 166 } \ 167 if (reg == 0) regs.raf.F |= BIT_Z; \ 168 if (reg & 0x80) regs.raf.F |= BIT_S; \ 169 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 170 } 171 172 #define rrc_byte(reg) { \ 173 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 174 if (reg & 0x01) { \ 175 regs.raf.F |= BIT_C; \ 176 reg = (reg >> 1) | 0x80; \ 177 } \ 178 else \ 179 reg = (reg >> 1); \ 180 if (reg == 0) regs.raf.F |= BIT_Z; \ 181 if (reg & 0x80) regs.raf.F |= BIT_S; \ 182 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 183 } 184 185 #define rl_byte(reg) { \ 186 if (regs.raf.F & BIT_C) { \ 187 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 188 if (reg & 0x80) \ 189 regs.raf.F |= BIT_C; \ 190 reg = (reg << 1) | 0x01; \ 191 } else { \ 192 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 193 if (reg & 0x80) \ 194 regs.raf.F |= BIT_C; \ 195 reg = (reg << 1); \ 196 } \ 197 if (reg == 0) regs.raf.F |= BIT_Z; \ 198 if (reg & 0x80) regs.raf.F |= BIT_S; \ 199 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 200 } 201 202 #define rlc_byte(reg) { \ 203 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 204 if (reg & 0x80) { \ 205 regs.raf.F |= BIT_C; \ 206 reg = (reg << 1) | 0x01; \ 207 } else \ 208 reg = (reg << 1); \ 209 if (reg == 0) regs.raf.F |= BIT_Z; \ 210 if (reg & 0x80) regs.raf.F |= BIT_S; \ 211 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 212 } 213 214 #define sla_byte(reg) { \ 215 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 216 if (reg & 0x80) \ 217 regs.raf.F |= BIT_C; \ 218 reg = (reg << 1); \ 219 if (reg == 0) regs.raf.F |= BIT_Z; \ 220 if (reg & 0x80) regs.raf.F |= BIT_S; \ 221 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 222 } 223 224 #define sra_byte(reg) { \ 225 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 226 if (reg & 0x80) { \ 227 if (reg & 0x01) \ 228 regs.raf.F |= BIT_C; \ 229 reg = (reg >> 1) | 0x80; \ 230 } else { \ 231 if (reg & 0x01) \ 232 regs.raf.F |= BIT_C; \ 233 reg = (reg >> 1); \ 234 } \ 235 if (reg == 0) regs.raf.F |= BIT_Z; \ 236 if (reg & 0x80) regs.raf.F |= BIT_S; \ 237 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 238 } 239 240 #define srl_byte(reg) { \ 241 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 242 if (reg & 0x01) \ 243 regs.raf.F |= BIT_C; \ 244 reg = (reg >> 1); \ 245 if (reg == 0) regs.raf.F |= BIT_Z; \ 246 if (reg & 0x80) regs.raf.F |= BIT_S; \ 247 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 248 } 249 250 /* following not in my book, best guess based on z80.txt comments */ 251 #define slia_byte(reg) { \ 252 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 253 if (reg & 0x80) \ 254 regs.raf.F |= BIT_C; \ 255 reg = (reg << 1) | 1; \ 256 if (reg == 0) regs.raf.F |= BIT_Z; \ 257 if (reg & 0x80) regs.raf.F |= BIT_S; \ 258 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 259 } 260 261 #define and_A_bytereg(br) { \ 262 regs.raf.A &= (br); \ 263 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 264 if (regs.raf.A == 0) regs.raf.F |= BIT_Z; \ 265 if (regs.raf.A & 0x80) regs.raf.F |= BIT_S; \ 266 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 267 } 268 269 #define xor_A_bytereg(br) { \ 270 regs.raf.A ^= (br); \ 271 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 272 if (regs.raf.A == 0) regs.raf.F |= BIT_Z; \ 273 if (regs.raf.A & 0x80) regs.raf.F |= BIT_S; \ 274 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 275 } 276 277 #define or_A_bytereg(br) { \ 278 regs.raf.A |= (br); \ 279 regs.raf.F &= ~(BIT_ALL); /* clear these */ \ 280 if (regs.raf.A == 0) regs.raf.F |= BIT_Z; \ 281 if (regs.raf.A & 0x80) regs.raf.F |= BIT_S; \ 282 if (parity(regs.raf.A)) regs.raf.F |= BIT_P; \ 283 } 284 285 #define inc(var) /* 8-bit increment */ { var++; \ 286 regs.raf.F &= ~(BIT_N |BIT_P |BIT_A |BIT_Z |BIT_S); /* clear these */ \ 287 if (var == 0) regs.raf.F |= BIT_Z; \ 288 if (var == 0x80) regs.raf.F |= BIT_P; \ 289 if (var & 0x80) regs.raf.F |= BIT_S; \ 290 if ((var & 0x0f) == 0) regs.raf.F |= BIT_A; \ 291 } 292 293 #define dec(var) { \ 294 --var; \ 295 regs.raf.F &= ~(BIT_N |BIT_P |BIT_A |BIT_Z |BIT_S); /* clear these */ \ 296 regs.raf.F |= BIT_N; /* Not add */ \ 297 if (var == 0) regs.raf.F |= BIT_Z; \ 298 if (var == 0x7f) regs.raf.F |= BIT_P; \ 299 if (var & 0x80) regs.raf.F |= BIT_S; \ 300 if ((var & 0x0f) == 0) regs.raf.F |= BIT_A; \ 301 } 302 303 #define bit_byte(reg, _bitnum) { \ 304 regs.raf.F &= ~(BIT_N |BIT_P |BIT_A |BIT_Z |BIT_S); /* clear these */ \ 305 regs.raf.F |= BIT_A; \ 306 if (!(reg & (1 << (_bitnum)))) \ 307 regs.raf.F |= BIT_Z; \ 308 /* book shows BIT_S & BIT_P as unknown state */ \ 309 } 310