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/dports/emulators/aranym/aranym-1.1.0/src/uae_cpu/compiler/
H A Dcodegen_arm.h93 #define SHIFT_REG(Rm) (Rm) argument
94 #define SHIFT_LSL_i(Rm,s) ((Rm) | ((s) << 7)) argument
102 #define SHIFT_RRX(Rm) ((Rm) | 0x60) argument
103 #define SHIFT_PK(Rm,s) ((Rm) | ((s) << 7)) argument
111 #define ADR_REG(Rm) ((1 << 25) | (1 << 24) | (Rm)) argument
112 #define ADR_REGPOST(Rm) ((1 << 25) | (Rm)) argument
117 #define ADD_REG(Rm) ADR_ADD(ADR_REG(Rm)) argument
118 #define SUB_REG(Rm) ADR_SUB(ADR_REG(Rm)) argument
132 #define ADD_RRX(Rm) ADR_ADD(ADR_REG(Rm) | (3 << 5)) argument
138 #define ADD2_REG(Rm) ADR_ADD(Rm) argument
[all …]
/dports/devel/orc/orc-0.4.31/orc/
H A Dorcarm.h116 int Rd, int Rn, int Rm);
124 int Rd, int Rm);
222 #define orc_arm_emit_sadd16(p,cond,Rd,Rn,Rm) orc_arm_emit_par(p,0,0,cond,Rd,Rn,Rm) argument
288 #define orc_arm_emit_sxtb16(p,cond,Rd,Rm) orc_arm_emit_sxtb_r8(p,cond,Rd,Rm,0) argument
289 #define orc_arm_emit_sxtb(p,cond,Rd,Rm) orc_arm_emit_sxtb_r8(p,cond,Rd,Rm,0) argument
290 #define orc_arm_emit_sxth(p,cond,Rd,Rm) orc_arm_emit_sxtb_r8(p,cond,Rd,Rm,0) argument
291 #define orc_arm_emit_uxtb16(p,cond,Rd,Rm) orc_arm_emit_sxtb_r8(p,cond,Rd,Rm,0) argument
292 #define orc_arm_emit_uxtb(p,cond,Rd,Rm) orc_arm_emit_sxtb_r8(p,cond,Rd,Rm,0) argument
293 #define orc_arm_emit_uxth(p,cond,Rd,Rm) orc_arm_emit_sxtb_r8(p,cond,Rd,Rm,0) argument
321 #define orc_arm_emit_rev(p,cond,Rd,Rm) orc_arm_emit_rv (p,0,cond,Rd,Rm) argument
[all …]
/dports/devel/android-tools-fastboot/platform_system_core-platform-tools-29.0.5/libpixelflinger/codeflinger/
H A DARMAssembler.cpp216 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MLA()
217 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); in MLA()
223 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MUL()
224 LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs); in MUL()
229 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMULL()
236 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMUAL()
243 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMULL()
250 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMUAL()
541 return (1<<25) | (((uint32_t(Rm)>>31)^1)<<23) | reg_imm(abs(Rm), type, shift); in reg_scale_post()
571 return (1<<24) | (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | (abs(Rm)&0xF); in reg_pre()
[all …]
H A DARMAssemblerProxy.cpp100 return mTarget->reg_rrx(Rm); in reg_rrx()
147 return mTarget->reg_pre(Rm, W); in reg_pre()
152 return mTarget->reg_post(Rm); in reg_post()
170 mTarget->MUL(cc, s, Rd, Rm, Rs); in MUL()
244 mTarget->SWP(cc, Rn, Rd, Rm); in SWP()
247 mTarget->SWPB(cc, Rn, Rd, Rm); in SWPB()
258 mTarget->CLZ(cc, Rd, Rm); in CLZ()
261 mTarget->QADD(cc, Rd, Rm, Rn); in QADD()
264 mTarget->QDADD(cc, Rd, Rm, Rn); in QDADD()
267 mTarget->QSUB(cc, Rd, Rm, Rn); in QSUB()
[all …]
H A DARMAssemblerInterface.h82 virtual uint32_t reg_rrx(int Rm) = 0;
98 virtual uint32_t reg_post(int Rm) = 0;
131 int Rd, int Rm, int Rs) = 0;
290 SMUL(cc, xyBB, Rd, Rm, Rs); } in SMULBB()
292 SMUL(cc, xyTB, Rd, Rm, Rs); } in SMULTB()
294 SMUL(cc, xyBT, Rd, Rm, Rs); } in SMULBT()
296 SMUL(cc, xyTT, Rd, Rm, Rs); } in SMULTT()
299 SMULW(cc, yB, Rd, Rm, Rs); } in SMULWB()
301 SMULW(cc, yT, Rd, Rm, Rs); } in SMULWT()
331 SMLAW(cc, yB, Rd, Rm, Rs, Rn); } in SMLAWB()
[all …]
/dports/devel/android-tools-adb/platform_system_core-android-9.0.0_r3/libpixelflinger/codeflinger/
H A DARMAssembler.cpp216 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MLA()
217 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); in MLA()
223 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MUL()
224 LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs); in MUL()
229 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMULL()
236 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMUAL()
243 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMULL()
250 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMUAL()
541 return (1<<25) | (((uint32_t(Rm)>>31)^1)<<23) | reg_imm(abs(Rm), type, shift); in reg_scale_post()
571 return (1<<24) | (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | (abs(Rm)&0xF); in reg_pre()
[all …]
H A DARMAssemblerProxy.cpp100 return mTarget->reg_rrx(Rm); in reg_rrx()
147 return mTarget->reg_pre(Rm, W); in reg_pre()
152 return mTarget->reg_post(Rm); in reg_post()
170 mTarget->MUL(cc, s, Rd, Rm, Rs); in MUL()
244 mTarget->SWP(cc, Rn, Rd, Rm); in SWP()
247 mTarget->SWPB(cc, Rn, Rd, Rm); in SWPB()
258 mTarget->CLZ(cc, Rd, Rm); in CLZ()
261 mTarget->QADD(cc, Rd, Rm, Rn); in QADD()
264 mTarget->QDADD(cc, Rd, Rm, Rn); in QDADD()
267 mTarget->QSUB(cc, Rd, Rm, Rn); in QSUB()
[all …]
H A DARMAssemblerInterface.h82 virtual uint32_t reg_rrx(int Rm) = 0;
98 virtual uint32_t reg_post(int Rm) = 0;
131 int Rd, int Rm, int Rs) = 0;
290 SMUL(cc, xyBB, Rd, Rm, Rs); } in SMULBB()
292 SMUL(cc, xyTB, Rd, Rm, Rs); } in SMULTB()
294 SMUL(cc, xyBT, Rd, Rm, Rs); } in SMULBT()
296 SMUL(cc, xyTT, Rd, Rm, Rs); } in SMULTT()
299 SMULW(cc, yB, Rd, Rm, Rs); } in SMULWB()
301 SMULW(cc, yT, Rd, Rm, Rs); } in SMULWT()
331 SMLAW(cc, yB, Rd, Rm, Rs, Rn); } in SMLAWB()
[all …]
/dports/games/libretro-picodrive/picodrive-600894e/cpu/sh2/mame/
H A Dsh2dasm.c17 #define Rm ((opcode >> 4) & 15) macro
107 sprintf(buffer, "MUL.L %s,%s", regname[Rm], regname[Rn]); in op0000()
170 sprintf(buffer, "DIV0S %s,%s", regname[Rm], regname[Rn]); in op0010()
173 sprintf(buffer, "TST %s,%s", regname[Rm], regname[Rn]); in op0010()
176 sprintf(buffer, "AND %s,%s", regname[Rm], regname[Rn]); in op0010()
179 sprintf(buffer, "XOR %s,%s", regname[Rm], regname[Rn]); in op0010()
182 sprintf(buffer, "OR %s,%s", regname[Rm], regname[Rn]); in op0010()
185 sprintf(buffer, "CMP/STR %s,%s", regname[Rm], regname[Rn]); in op0010()
188 sprintf(buffer, "XTRCT %s,%s", regname[Rm], regname[Rn]); in op0010()
191 sprintf(buffer, "MULU.W %s,%s", regname[Rm], regname[Rn]); in op0010()
[all …]
/dports/games/kodi-addon-game.libretro.picodrive/game.libretro.picodrive-1.97.0.19-Matrix/depends/common/picodrive/cpu/sh2/mame/
H A Dsh2dasm.c17 #define Rm ((opcode >> 4) & 15) macro
107 sprintf(buffer, "MUL.L %s,%s", regname[Rm], regname[Rn]); in op0000()
170 sprintf(buffer, "DIV0S %s,%s", regname[Rm], regname[Rn]); in op0010()
173 sprintf(buffer, "TST %s,%s", regname[Rm], regname[Rn]); in op0010()
176 sprintf(buffer, "AND %s,%s", regname[Rm], regname[Rn]); in op0010()
179 sprintf(buffer, "XOR %s,%s", regname[Rm], regname[Rn]); in op0010()
182 sprintf(buffer, "OR %s,%s", regname[Rm], regname[Rn]); in op0010()
185 sprintf(buffer, "CMP/STR %s,%s", regname[Rm], regname[Rn]); in op0010()
188 sprintf(buffer, "XTRCT %s,%s", regname[Rm], regname[Rn]); in op0010()
191 sprintf(buffer, "MULU.W %s,%s", regname[Rm], regname[Rn]); in op0010()
[all …]
/dports/games/libretro-mame2003_plus/mame2003-plus-libretro-17e9889/src/cpu/sh2/
H A Dsh2dasm.c12 #define Rm ((opcode >> 4) & 15) macro
189 sprintf(buffer, "DIV0S %s,%s", regname[Rm], regname[Rn]); in op0010()
192 sprintf(buffer, "TST %s,%s", regname[Rm], regname[Rn]); in op0010()
195 sprintf(buffer, "AND %s,%s", regname[Rm], regname[Rn]); in op0010()
198 sprintf(buffer, "XOR %s,%s", regname[Rm], regname[Rn]); in op0010()
201 sprintf(buffer, "OR %s,%s", regname[Rm], regname[Rn]); in op0010()
204 sprintf(buffer, "CMP/STR %s,%s", regname[Rm], regname[Rn]); in op0010()
498 sprintf(buffer, "MOV.B R0,@(%s,%s)", sym, regname[Rm]); in op1000()
503 sprintf(buffer, "MOV.W R0,@(%s,%s)", sym, regname[Rm]); in op1000()
508 sprintf(buffer, "MOV.B @(%s,%s),R0", sym, regname[Rm]); in op1000()
[all …]
/dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/cpu/sh2/
H A Dsh2dasm.c12 #define Rm ((opcode >> 4) & 15) macro
189 sprintf(buffer, "DIV0S %s,%s", regname[Rm], regname[Rn]); in op0010()
192 sprintf(buffer, "TST %s,%s", regname[Rm], regname[Rn]); in op0010()
195 sprintf(buffer, "AND %s,%s", regname[Rm], regname[Rn]); in op0010()
198 sprintf(buffer, "XOR %s,%s", regname[Rm], regname[Rn]); in op0010()
201 sprintf(buffer, "OR %s,%s", regname[Rm], regname[Rn]); in op0010()
204 sprintf(buffer, "CMP/STR %s,%s", regname[Rm], regname[Rn]); in op0010()
498 sprintf(buffer, "MOV.B R0,@(%s,%s)", sym, regname[Rm]); in op1000()
503 sprintf(buffer, "MOV.W R0,@(%s,%s)", sym, regname[Rm]); in op1000()
508 sprintf(buffer, "MOV.B @(%s,%s),R0", sym, regname[Rm]); in op1000()
[all …]
/dports/lang/erlang-runtime22/otp-OTP-22.3.4.24/lib/hipe/arm/
H A Dhipe_arm_encode.erl113 {r,Rm} ->
115 ?BF(3,0,Rm);
116 {{r,Rm},ShiftOp} ->
117 am1_shift_op(Rn, Rd, Rm, ShiftOp) bor ?BF(3,0,Rm)
709 Rm = {r,7},
736 AM1_2 = Rm,
741 AM1_3_5 = {Rm,{'lsl',Rs}},
742 AM1_3_6 = {Rm,{'lsr',Rs}},
745 AM1_3_9 = {Rm,'rrx'},
865 t(OS,'blx',{Cond_al,Rm}),
[all …]
/dports/lang/erlang-runtime23/otp-OTP-23.3.4.10/lib/hipe/arm/
H A Dhipe_arm_encode.erl113 {r,Rm} ->
115 ?BF(3,0,Rm);
116 {{r,Rm},ShiftOp} ->
117 am1_shift_op(Rn, Rd, Rm, ShiftOp) bor ?BF(3,0,Rm)
709 Rm = {r,7},
736 AM1_2 = Rm,
741 AM1_3_5 = {Rm,{'lsl',Rs}},
742 AM1_3_6 = {Rm,{'lsr',Rs}},
745 AM1_3_9 = {Rm,'rrx'},
865 t(OS,'blx',{Cond_al,Rm}),
[all …]
/dports/lang/erlang-runtime21/otp-OTP-21.3.8.24/lib/hipe/arm/
H A Dhipe_arm_encode.erl113 {r,Rm} ->
115 ?BF(3,0,Rm);
116 {{r,Rm},ShiftOp} ->
117 am1_shift_op(Rn, Rd, Rm, ShiftOp) bor ?BF(3,0,Rm)
709 Rm = {r,7},
736 AM1_2 = Rm,
741 AM1_3_5 = {Rm,{'lsl',Rs}},
742 AM1_3_6 = {Rm,{'lsr',Rs}},
745 AM1_3_9 = {Rm,'rrx'},
865 t(OS,'blx',{Cond_al,Rm}),
[all …]
/dports/math/py-Diofant/Diofant-0.13.0/diofant/tests/diffgeom/
H A Dtest_hyperbolic_space.py61 assert Rm[0, 0, 0, 0] == 0
62 assert Rm[0, 0, 0, 1] == 0
63 assert Rm[0, 0, 1, 0] == 0
64 assert Rm[0, 0, 1, 1] == 0
66 assert Rm[0, 1, 0, 0] == 0
69 assert Rm[0, 1, 1, 1] == 0
71 assert Rm[1, 0, 0, 0] == 0
74 assert Rm[1, 0, 1, 1] == 0
76 assert Rm[1, 1, 0, 0] == 0
77 assert Rm[1, 1, 0, 1] == 0
[all …]
/dports/math/py-sympy/sympy-1.9/sympy/diffgeom/tests/
H A Dtest_hyperbolic_space.py57 assert Rm[0, 0, 0, 0] == 0
58 assert Rm[0, 0, 0, 1] == 0
59 assert Rm[0, 0, 1, 0] == 0
60 assert Rm[0, 0, 1, 1] == 0
62 assert Rm[0, 1, 0, 0] == 0
65 assert Rm[0, 1, 1, 1] == 0
67 assert Rm[1, 0, 0, 0] == 0
70 assert Rm[1, 0, 1, 1] == 0
72 assert Rm[1, 1, 0, 0] == 0
73 assert Rm[1, 1, 0, 1] == 0
[all …]
/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/emitter/
H A Da64_emitter.h589 void CMN(ARM64Reg Rn, ARM64Reg Rm);
591 void CMP(ARM64Reg Rn, ARM64Reg Rm);
703 void MOV(ARM64Reg Rd, ARM64Reg Rm);
704 void MVN(ARM64Reg Rd, ARM64Reg Rm);
707 void LSR(ARM64Reg Rd, ARM64Reg Rm, int shift);
718 void TST(ARM64Reg Rn, ARM64Reg Rm) { in TST() argument
719 ANDS(Is64Bit(Rn) ? ZR : WZR, Rn, Rm); in TST()
1053 void FCMP(ARM64Reg Rn, ARM64Reg Rm);
1055 void FCMPE(ARM64Reg Rn, ARM64Reg Rm);
1115 ARM64Reg Rm);
[all …]
/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/emitter/
H A Da64_emitter.h589 void CMN(ARM64Reg Rn, ARM64Reg Rm);
591 void CMP(ARM64Reg Rn, ARM64Reg Rm);
703 void MOV(ARM64Reg Rd, ARM64Reg Rm);
704 void MVN(ARM64Reg Rd, ARM64Reg Rm);
707 void LSR(ARM64Reg Rd, ARM64Reg Rm, int shift);
718 void TST(ARM64Reg Rn, ARM64Reg Rm) { in TST() argument
719 ANDS(Is64Bit(Rn) ? ZR : WZR, Rn, Rm); in TST()
1053 void FCMP(ARM64Reg Rn, ARM64Reg Rm);
1055 void FCMPE(ARM64Reg Rn, ARM64Reg Rm);
1115 ARM64Reg Rm);
[all …]
/dports/emulators/citra/citra-ac98458e0/src/core/arm/dyncom/
H A Darm_dyncom_trans.h34 u32 Rm; member
94 unsigned int Rm; member
100 u32 Rm; member
106 unsigned int Rm; member
121 unsigned int Rm; member
207 unsigned int Rm; member
243 unsigned int Rm; member
249 unsigned int Rm; member
259 unsigned int Rm; member
264 unsigned int Rm; member
[all …]
/dports/emulators/citra-qt5/citra-ac98458e0/src/core/arm/dyncom/
H A Darm_dyncom_trans.h34 u32 Rm; member
94 unsigned int Rm; member
100 u32 Rm; member
106 unsigned int Rm; member
121 unsigned int Rm; member
207 unsigned int Rm; member
243 unsigned int Rm; member
249 unsigned int Rm; member
259 unsigned int Rm; member
264 unsigned int Rm; member
[all …]
/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Common/
H A DArm64Emitter.h471 void CMN(ARM64Reg Rn, ARM64Reg Rm);
473 void CMP(ARM64Reg Rn, ARM64Reg Rm);
555 void AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { AND(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); }
556 void BIC(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { BIC(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); }
557 void ORR(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ORR(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); }
558 void ORN(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ORN(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in EncodeArithmeticCarryInst() argument
559 void EOR(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { EOR(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); }
560 void EON(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { EON(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); }
561 void ANDS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ANDS(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); }
562 void BICS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { BICS(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); }
[all …]
/dports/emulators/ppsspp/ppsspp-1.12.3/Common/
H A DArm64Emitter.h471 void CMN(ARM64Reg Rn, ARM64Reg Rm);
473 void CMP(ARM64Reg Rn, ARM64Reg Rm);
555 void AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { AND(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in AND() argument
556 void BIC(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { BIC(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in BIC() argument
557 void ORR(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ORR(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in ORR() argument
558 void ORN(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ORN(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in ORN() argument
559 void EOR(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { EOR(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in EOR() argument
560 void EON(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { EON(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in EON() argument
561 void ANDS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ANDS(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in ANDS() argument
562 void BICS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { BICS(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in BICS() argument
[all …]
/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Common/
H A DArm64Emitter.h471 void CMN(ARM64Reg Rn, ARM64Reg Rm);
473 void CMP(ARM64Reg Rn, ARM64Reg Rm);
555 void AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { AND(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in AND() argument
556 void BIC(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { BIC(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in BIC() argument
557 void ORR(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ORR(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in ORR() argument
558 void ORN(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ORN(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in ORN() argument
559 void EOR(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { EOR(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in EOR() argument
560 void EON(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { EON(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in EON() argument
561 void ANDS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { ANDS(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in ANDS() argument
562 void BICS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { BICS(Rd, Rn, Rm, ArithOption(Rd, ST_LSL, 0)); } in BICS() argument
[all …]
/dports/emulators/mess/mame-mame0226/src/devices/cpu/sh/
H A Dsh_dasm.cpp9 #define Rm ((opcode>>4)&15) macro
102 util::stream_format(stream, "MUL.L %s,%s", regname[Rm], regname[Rn]); in op0000()
165 util::stream_format(stream, "DIV0S %s,%s", regname[Rm], regname[Rn]); in op0010()
168 util::stream_format(stream, "TST %s,%s", regname[Rm], regname[Rn]); in op0010()
171 util::stream_format(stream, "AND %s,%s", regname[Rm], regname[Rn]); in op0010()
174 util::stream_format(stream, "XOR %s,%s", regname[Rm], regname[Rn]); in op0010()
177 util::stream_format(stream, "OR %s,%s", regname[Rm], regname[Rn]); in op0010()
180 util::stream_format(stream, "CMP/STR %s,%s", regname[Rm], regname[Rn]); in op0010()
183 util::stream_format(stream, "XTRCT %s,%s", regname[Rm], regname[Rn]); in op0010()
186 util::stream_format(stream, "MULU.W %s,%s", regname[Rm], regname[Rn]); in op0010()
[all …]

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