| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
| H A D | pxa3xx-regs.h | 47 #define AD2D1SR __REG(0x40f4001c) /* Application Subsystem Wake-Up from D2 to D1 Status */ macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
| H A D | pxa3xx-regs.h | 47 #define AD2D1SR __REG(0x40f4001c) /* Application Subsystem Wake-Up from D2 to D1 Status */ macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
| H A D | pxa3xx-regs.h | 47 #define AD2D1SR __REG(0x40f4001c) /* Application Subsystem Wake-Up from D2 to D1 Status */ macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/ |
| H A D | pxa3xx.c | 78 AD2D1SR = ~0; in pxa3xx_cpu_standby()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/ |
| H A D | pxa3xx.c | 78 AD2D1SR = ~0; in pxa3xx_cpu_standby()
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/ |
| H A D | pxa3xx.c | 78 AD2D1SR = ~0; in pxa3xx_cpu_standby()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 1907 #define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ macro
|