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Searched refs:AM30 (Results 1 – 25 of 108) sorted by relevance

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/dports/devel/binutils/binutils-2.37/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmn10300.h164 #define AM30 300 macro
/dports/devel/gnulibiberty/binutils-2.37/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/avr-gdb/gdb-7.3.1/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/gdb/gdb-11.1/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/gdb761/gdb-7.6.1/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/
H A Dmn10300.h164 #define AM30 300 macro
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmn10300.h164 #define AM30 300 macro
/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/
H A Dmn10300.h165 #define AM30 300 macro
/dports/devel/djgpp-binutils/binutils-2.17/include/opcode/
H A Dmn10300.h164 #define AM30 300 macro
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dm10300-opc.c1287 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1288 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1289 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1290 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1291 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1292 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1293 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1294 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1297 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1300 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dm10300-opc.c1289 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1290 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1291 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1292 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1293 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1294 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1295 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1296 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1299 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1302 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dm10300-opc.c1289 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1290 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1291 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1292 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1293 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1294 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1295 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1296 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1299 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1302 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dm10300-opc.c1286 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1287 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1288 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1289 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1290 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1291 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1292 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1293 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1296 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1299 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A Dm10300-opc.c1289 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1290 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1291 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1292 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1293 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1294 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1295 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1296 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1299 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1302 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dm10300-opc.c1290 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1291 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1292 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1293 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1294 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1295 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1296 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1297 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1300 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1303 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dm10300-opc.c1290 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1291 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1292 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1293 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1294 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1295 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1296 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1297 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1300 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1303 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/gdb/gdb-11.1/opcodes/
H A Dm10300-opc.c1289 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1290 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1291 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1292 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1293 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1294 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1295 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1296 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1299 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1302 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A Dm10300-opc.c1289 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1290 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1291 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1292 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1293 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1294 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1295 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1296 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1299 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1302 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dm10300-opc.c1286 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1287 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1288 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1289 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1290 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1291 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1292 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1293 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1296 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1299 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dm10300-opc.c1287 { "putx", 0xf500, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1288 { "getx", 0xf6f0, 0xfff0, 0, FMT_D0, AM30, {DN01}},
1289 { "mulq", 0xf600, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1290 { "mulq", 0xf90000, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1291 { "mulq", 0xfb000000, 0xfffc0000, 0, FMT_D2, AM30, {SIMM16, DN0}},
1292 { "mulq", 0xfd000000, 0xfffc0000, 0, FMT_D4, AM30, {IMM32, DN0}},
1293 { "mulqu", 0xf610, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1294 { "mulqu", 0xf91400, 0xfffc00, 0, FMT_D1, AM30, {SIMM8, DN0}},
1297 { "sat16", 0xf640, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
1300 { "sat24", 0xf650, 0xfff0, 0, FMT_D0, AM30, {DM1, DN0}},
[all …]

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