Home
last modified time | relevance | path

Searched refs:AMDGPU_VCN_CONTEXT_SIZE (Results 1 – 18 of 18) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vcn.h28 #define AMDGPU_VCN_CONTEXT_SIZE (512*1024) macro
H A Dvcn_v2_0.c364 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_0_mc_resume()
454 UVD, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
1939 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_0_start_sriov()
H A Dvcn_v2_5.c428 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_5_mc_resume()
517 VCN, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
1248 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_5_sriov_start()
H A Dvcn_v3_0.c490 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v3_0_mc_resume()
578 VCN, inst_idx, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
1397 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v3_0_start_sriov()
H A Dvcn_v1_0.c329 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v1_0_mc_resume_spg_mode()
403 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE, in vcn_v1_0_mc_resume_dpg_mode()
H A Damdgpu_vcn.c204 bo_size = AMDGPU_VCN_STACK_SIZE + AMDGPU_VCN_CONTEXT_SIZE; in amdgpu_vcn_sw_init()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vcn.h28 #define AMDGPU_VCN_CONTEXT_SIZE (512*1024) macro
H A Dvcn_v2_0.c364 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_0_mc_resume()
454 UVD, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
1939 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_0_start_sriov()
H A Dvcn_v2_5.c428 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_5_mc_resume()
517 VCN, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
1248 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_5_sriov_start()
H A Dvcn_v3_0.c490 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v3_0_mc_resume()
578 VCN, inst_idx, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
1397 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v3_0_start_sriov()
H A Dvcn_v1_0.c329 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v1_0_mc_resume_spg_mode()
403 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE, in vcn_v1_0_mc_resume_dpg_mode()
H A Damdgpu_vcn.c204 bo_size = AMDGPU_VCN_STACK_SIZE + AMDGPU_VCN_CONTEXT_SIZE; in amdgpu_vcn_sw_init()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vcn.h28 #define AMDGPU_VCN_CONTEXT_SIZE (512*1024) macro
H A Dvcn_v2_0.c364 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_0_mc_resume()
454 UVD, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
1939 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_0_start_sriov()
H A Dvcn_v2_5.c428 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_5_mc_resume()
517 VCN, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
1248 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v2_5_sriov_start()
H A Dvcn_v3_0.c490 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v3_0_mc_resume()
578 VCN, inst_idx, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
1397 AMDGPU_VCN_CONTEXT_SIZE); in vcn_v3_0_start_sriov()
H A Dvcn_v1_0.c329 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); in vcn_v1_0_mc_resume_spg_mode()
403 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE, in vcn_v1_0_mc_resume_dpg_mode()
H A Damdgpu_vcn.c204 bo_size = AMDGPU_VCN_STACK_SIZE + AMDGPU_VCN_CONTEXT_SIZE; in amdgpu_vcn_sw_init()