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Searched refs:ARM_AM_add (Results 1 – 25 of 32) sorted by relevance

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/dports/emulators/qemu/qemu-6.2.0/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
583 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM5FP16Op()
H A DARMDisassembler.c1546 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1658 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1750 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2412 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
2432 MCOperand_CreateImm0(Inst, getAM5FP16Opc(ARM_AM_add, imm)); in DecodeAddrMode5FP16Operand()
/dports/emulators/qemu60/qemu-6.0.0/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
583 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM5FP16Op()
H A DARMDisassembler.c1546 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1658 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1750 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2412 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
2432 MCOperand_CreateImm0(Inst, getAM5FP16Opc(ARM_AM_add, imm)); in DecodeAddrMode5FP16Operand()
/dports/emulators/qemu5/qemu-5.2.0/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
583 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM5FP16Op()
H A DARMDisassembler.c1546 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1658 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1750 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2412 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
2432 MCOperand_CreateImm0(Inst, getAM5FP16Opc(ARM_AM_add, imm)); in DecodeAddrMode5FP16Operand()
/dports/devel/xelfviewer/XELFViewer-0.03/XCapstone/3rdparty/Capstone/src/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
583 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM5FP16Op()
H A DARMDisassembler.c1546 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1658 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1750 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2412 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
2432 MCOperand_CreateImm0(Inst, getAM5FP16Opc(ARM_AM_add, imm)); in DecodeAddrMode5FP16Operand()
/dports/devel/capstone4/capstone-4.0.2/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1463 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1575 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1662 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2212 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
/dports/devel/capstone3/capstone-3.0.5/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1456 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1568 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1655 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2205 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
H A DARMInstPrinter.c578 if ((getAM2Op((unsigned int)MCOperand_getImm(MO2)) == ARM_AM_add && in ARM_printInst()
/dports/emulators/qemu42/qemu-4.2.1/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1456 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1568 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1655 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2205 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1456 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1568 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1655 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2205 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
/dports/devel/py-capstone/capstone-4.0.1/src/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1471 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1583 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1670 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2220 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
/dports/devel/redasm/REDasm-2.1.1/LibREDasm/depends/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1471 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1583 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1670 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2220 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
/dports/emulators/qemu-utils/qemu-4.2.1/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1456 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1568 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1655 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2205 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/capstone/arch/ARM/
H A DARMAddressingModes.h35 ARM_AM_add enumerator
457 return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM2Op()
499 return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in getAM3Op()
555 return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; in ARM_AM_getAM5Op()
H A DARMDisassembler.c1456 imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); in DecodeCopMemInstruction()
1568 Op = ARM_AM_add; in DecodeAddrMode2IdxInstruction()
1655 shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); in DecodeSORegMemOperand()
2205 MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); in DecodeAddrMode5Operand()

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