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Searched refs:ARM_MMU_IDX_A (Results 1 – 17 of 17) sorted by relevance

/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dcpu.h2882 ARMMMUIdx_E10_0 = 0 | ARM_MMU_IDX_A,
2883 ARMMMUIdx_E20_0 = 1 | ARM_MMU_IDX_A,
2885 ARMMMUIdx_E10_1 = 2 | ARM_MMU_IDX_A,
2886 ARMMMUIdx_E10_1_PAN = 3 | ARM_MMU_IDX_A,
2888 ARMMMUIdx_E2 = 4 | ARM_MMU_IDX_A,
2889 ARMMMUIdx_E20_2 = 5 | ARM_MMU_IDX_A,
2890 ARMMMUIdx_E20_2_PAN = 6 | ARM_MMU_IDX_A,
2892 ARMMMUIdx_SE10_0 = 7 | ARM_MMU_IDX_A,
2893 ARMMMUIdx_SE10_1 = 8 | ARM_MMU_IDX_A,
2894 ARMMMUIdx_SE10_1_PAN = 9 | ARM_MMU_IDX_A,
[all …]
H A Dinternals.h782 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
789 return mmu_idx | ARM_MMU_IDX_A; in core_to_aa64_mmu_idx()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dcpu.h2882 ARMMMUIdx_E10_0 = 0 | ARM_MMU_IDX_A,
2883 ARMMMUIdx_E20_0 = 1 | ARM_MMU_IDX_A,
2885 ARMMMUIdx_E10_1 = 2 | ARM_MMU_IDX_A,
2886 ARMMMUIdx_E10_1_PAN = 3 | ARM_MMU_IDX_A,
2888 ARMMMUIdx_E2 = 4 | ARM_MMU_IDX_A,
2889 ARMMMUIdx_E20_2 = 5 | ARM_MMU_IDX_A,
2890 ARMMMUIdx_E20_2_PAN = 6 | ARM_MMU_IDX_A,
2892 ARMMMUIdx_SE10_0 = 7 | ARM_MMU_IDX_A,
2893 ARMMMUIdx_SE10_1 = 8 | ARM_MMU_IDX_A,
2894 ARMMMUIdx_SE10_1_PAN = 9 | ARM_MMU_IDX_A,
[all …]
H A Dinternals.h782 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
789 return mmu_idx | ARM_MMU_IDX_A; in core_to_aa64_mmu_idx()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dcpu.h2591 #define ARM_MMU_IDX_A 0x10 /* A profile */ macro
2604 ARMMMUIdx_S12NSE0 = 0 | ARM_MMU_IDX_A,
2605 ARMMMUIdx_S12NSE1 = 1 | ARM_MMU_IDX_A,
2606 ARMMMUIdx_S1E2 = 2 | ARM_MMU_IDX_A,
2607 ARMMMUIdx_S1E3 = 3 | ARM_MMU_IDX_A,
2608 ARMMMUIdx_S1SE0 = 4 | ARM_MMU_IDX_A,
2609 ARMMMUIdx_S1SE1 = 5 | ARM_MMU_IDX_A,
2610 ARMMMUIdx_S2NS = 6 | ARM_MMU_IDX_A,
2659 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
2667 case ARM_MMU_IDX_A: in arm_mmu_idx_to_el()
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dcpu.h2940 ARMMMUIdx_E10_0 = 0 | ARM_MMU_IDX_A,
2941 ARMMMUIdx_E20_0 = 1 | ARM_MMU_IDX_A,
2943 ARMMMUIdx_E10_1 = 2 | ARM_MMU_IDX_A,
2944 ARMMMUIdx_E10_1_PAN = 3 | ARM_MMU_IDX_A,
2946 ARMMMUIdx_E2 = 4 | ARM_MMU_IDX_A,
2947 ARMMMUIdx_E20_2 = 5 | ARM_MMU_IDX_A,
2948 ARMMMUIdx_E20_2_PAN = 6 | ARM_MMU_IDX_A,
2950 ARMMMUIdx_SE10_0 = 7 | ARM_MMU_IDX_A,
2951 ARMMMUIdx_SE10_1 = 8 | ARM_MMU_IDX_A,
2952 ARMMMUIdx_SE10_1_PAN = 9 | ARM_MMU_IDX_A,
[all …]
H A Dinternals.h783 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
790 return mmu_idx | ARM_MMU_IDX_A; in core_to_aa64_mmu_idx()
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dcpu.h2865 #define ARM_MMU_IDX_A 0x10 /* A profile */ macro
2878 ARMMMUIdx_S12NSE0 = 0 | ARM_MMU_IDX_A,
2879 ARMMMUIdx_S12NSE1 = 1 | ARM_MMU_IDX_A,
2880 ARMMMUIdx_S1E2 = 2 | ARM_MMU_IDX_A,
2881 ARMMMUIdx_S1E3 = 3 | ARM_MMU_IDX_A,
2882 ARMMMUIdx_S1SE0 = 4 | ARM_MMU_IDX_A,
2883 ARMMMUIdx_S1SE1 = 5 | ARM_MMU_IDX_A,
2884 ARMMMUIdx_S2NS = 6 | ARM_MMU_IDX_A,
2933 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
2941 case ARM_MMU_IDX_A: in arm_mmu_idx_to_el()
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dcpu.h2865 #define ARM_MMU_IDX_A 0x10 /* A profile */ macro
2878 ARMMMUIdx_S12NSE0 = 0 | ARM_MMU_IDX_A,
2879 ARMMMUIdx_S12NSE1 = 1 | ARM_MMU_IDX_A,
2880 ARMMMUIdx_S1E2 = 2 | ARM_MMU_IDX_A,
2881 ARMMMUIdx_S1E3 = 3 | ARM_MMU_IDX_A,
2882 ARMMMUIdx_S1SE0 = 4 | ARM_MMU_IDX_A,
2883 ARMMMUIdx_S1SE1 = 5 | ARM_MMU_IDX_A,
2884 ARMMMUIdx_S2NS = 6 | ARM_MMU_IDX_A,
2933 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
2941 case ARM_MMU_IDX_A: in arm_mmu_idx_to_el()
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dcpu.h3072 #define ARM_MMU_IDX_A 0x10 /* A profile */ macro
3085 (ARM_MMU_IDX_A | ARM_MMU_IDX_M | ARM_MMU_IDX_NOTLB)
3092 ARMMMUIdx_SE10_0 = 0 | ARM_MMU_IDX_A,
3093 ARMMMUIdx_SE20_0 = 1 | ARM_MMU_IDX_A,
3094 ARMMMUIdx_SE10_1 = 2 | ARM_MMU_IDX_A,
3095 ARMMMUIdx_SE20_2 = 3 | ARM_MMU_IDX_A,
3096 ARMMMUIdx_SE10_1_PAN = 4 | ARM_MMU_IDX_A,
3097 ARMMMUIdx_SE20_2_PAN = 5 | ARM_MMU_IDX_A,
3098 ARMMMUIdx_SE2 = 6 | ARM_MMU_IDX_A,
3099 ARMMMUIdx_SE3 = 7 | ARM_MMU_IDX_A,
H A Dinternals.h547 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
554 return mmu_idx | ARM_MMU_IDX_A; in core_to_aa64_mmu_idx()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dcpu.h3110 #define ARM_MMU_IDX_A 0x10 /* A profile */ macro
3123 (ARM_MMU_IDX_A | ARM_MMU_IDX_M | ARM_MMU_IDX_NOTLB)
3130 ARMMMUIdx_SE10_0 = 0 | ARM_MMU_IDX_A,
3131 ARMMMUIdx_SE20_0 = 1 | ARM_MMU_IDX_A,
3132 ARMMMUIdx_SE10_1 = 2 | ARM_MMU_IDX_A,
3133 ARMMMUIdx_SE20_2 = 3 | ARM_MMU_IDX_A,
3134 ARMMMUIdx_SE10_1_PAN = 4 | ARM_MMU_IDX_A,
3135 ARMMMUIdx_SE20_2_PAN = 5 | ARM_MMU_IDX_A,
3136 ARMMMUIdx_SE2 = 6 | ARM_MMU_IDX_A,
3137 ARMMMUIdx_SE3 = 7 | ARM_MMU_IDX_A,
H A Dinternals.h561 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
568 return mmu_idx | ARM_MMU_IDX_A; in core_to_aa64_mmu_idx()
H A Dhelper.c4782 ARMMMUIdx one_idx = ARM_MMU_IDX_A | ctz32(idxmap); in do_rvae_write()
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dcpu.h3110 #define ARM_MMU_IDX_A 0x10 /* A profile */ macro
3123 (ARM_MMU_IDX_A | ARM_MMU_IDX_M | ARM_MMU_IDX_NOTLB)
3130 ARMMMUIdx_SE10_0 = 0 | ARM_MMU_IDX_A,
3131 ARMMMUIdx_SE20_0 = 1 | ARM_MMU_IDX_A,
3132 ARMMMUIdx_SE10_1 = 2 | ARM_MMU_IDX_A,
3133 ARMMMUIdx_SE20_2 = 3 | ARM_MMU_IDX_A,
3134 ARMMMUIdx_SE10_1_PAN = 4 | ARM_MMU_IDX_A,
3135 ARMMMUIdx_SE20_2_PAN = 5 | ARM_MMU_IDX_A,
3136 ARMMMUIdx_SE2 = 6 | ARM_MMU_IDX_A,
3137 ARMMMUIdx_SE3 = 7 | ARM_MMU_IDX_A,
H A Dinternals.h569 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
576 return mmu_idx | ARM_MMU_IDX_A; in core_to_aa64_mmu_idx()
H A Dhelper.c4558 ARMMMUIdx one_idx = ARM_MMU_IDX_A | ctz32(idxmap); in do_rvae_write()