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Searched refs:ARM_MMU_IDX_M_S (Results 1 – 18 of 18) sorted by relevance

/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dcpu.h2930 #define ARM_MMU_IDX_M_S 0x4 /* Secure */ macro
2978 ARMMMUIdx_MSUser = ARMMMUIdx_MUser | ARM_MMU_IDX_M_S,
2979 ARMMMUIdx_MSPriv = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_S,
2980 ARMMMUIdx_MSUserNegPri = ARMMMUIdx_MUserNegPri | ARM_MMU_IDX_M_S,
2981 ARMMMUIdx_MSPrivNegPri = ARMMMUIdx_MPrivNegPri | ARM_MMU_IDX_M_S,
H A Dm_helper.c191 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
284 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2705 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dcpu.h2872 #define ARM_MMU_IDX_M_S 0x4 /* Secure */ macro
2914 ARMMMUIdx_MSUser = ARMMMUIdx_MUser | ARM_MMU_IDX_M_S,
2915 ARMMMUIdx_MSPriv = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_S,
2916 ARMMMUIdx_MSUserNegPri = ARMMMUIdx_MUserNegPri | ARM_MMU_IDX_M_S,
2917 ARMMMUIdx_MSPrivNegPri = ARMMMUIdx_MPrivNegPri | ARM_MMU_IDX_M_S,
H A Dm_helper.c190 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
282 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2702 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dcpu.h2872 #define ARM_MMU_IDX_M_S 0x4 /* Secure */ macro
2914 ARMMMUIdx_MSUser = ARMMMUIdx_MUser | ARM_MMU_IDX_M_S,
2915 ARMMMUIdx_MSPriv = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_S,
2916 ARMMMUIdx_MSUserNegPri = ARMMMUIdx_MUserNegPri | ARM_MMU_IDX_M_S,
2917 ARMMMUIdx_MSPrivNegPri = ARMMMUIdx_MPrivNegPri | ARM_MMU_IDX_M_S,
H A Dm_helper.c190 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
282 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2702 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dcpu.h3082 #define ARM_MMU_IDX_M_S 0x4 /* Secure */ macro
3136 ARMMMUIdx_MSUser = ARMMMUIdx_MUser | ARM_MMU_IDX_M_S,
3137 ARMMMUIdx_MSPriv = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_S,
3138 ARMMMUIdx_MSUserNegPri = ARMMMUIdx_MUserNegPri | ARM_MMU_IDX_M_S,
3139 ARMMMUIdx_MSPrivNegPri = ARMMMUIdx_MPrivNegPri | ARM_MMU_IDX_M_S,
H A Dm_helper.c192 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
285 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2828 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dcpu.h3120 #define ARM_MMU_IDX_M_S 0x4 /* Secure */ macro
3174 ARMMMUIdx_MSUser = ARMMMUIdx_MUser | ARM_MMU_IDX_M_S,
3175 ARMMMUIdx_MSPriv = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_S,
3176 ARMMMUIdx_MSUserNegPri = ARMMMUIdx_MUserNegPri | ARM_MMU_IDX_M_S,
3177 ARMMMUIdx_MSPrivNegPri = ARMMMUIdx_MPrivNegPri | ARM_MMU_IDX_M_S,
H A Dm_helper.c192 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
285 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2880 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dcpu.h3120 #define ARM_MMU_IDX_M_S 0x4 /* Secure */ macro
3174 ARMMMUIdx_MSUser = ARMMMUIdx_MUser | ARM_MMU_IDX_M_S,
3175 ARMMMUIdx_MSPriv = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_S,
3176 ARMMMUIdx_MSUserNegPri = ARMMMUIdx_MUserNegPri | ARM_MMU_IDX_M_S,
3177 ARMMMUIdx_MSPrivNegPri = ARMMMUIdx_MPrivNegPri | ARM_MMU_IDX_M_S,
H A Dm_helper.c192 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
285 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2880 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dm_helper.c190 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
282 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2700 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
H A Dcpu.h2872 #define ARM_MMU_IDX_M_S 0x4 macro
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dm_helper.c190 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
282 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()
2700 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
H A Dcpu.h2872 #define ARM_MMU_IDX_M_S 0x4 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dcpu.h2598 #define ARM_MMU_IDX_M_S 0x4 macro
2694 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_for_secstate_and_priv()
H A Dhelper.c6476 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write()
6538 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read()