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Searched refs:ARM_PC (Results 1 – 25 of 187) sorted by relevance

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/dports/games/libretro-mgba/mgba-6186d45/include/mgba/internal/arm/
H A Disa-inlines.h59 cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_ARM); in ARMWritePC()
60 cpu->memory.setActiveRegion(cpu, cpu->gprs[ARM_PC]); in ARMWritePC()
61 LOAD_32(cpu->prefetch[0], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); in ARMWritePC()
62 cpu->gprs[ARM_PC] += WORD_SIZE_ARM; in ARMWritePC()
63 LOAD_32(cpu->prefetch[1], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); in ARMWritePC()
68 cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB); in ThumbWritePC()
69 cpu->memory.setActiveRegion(cpu, cpu->gprs[ARM_PC]); in ThumbWritePC()
70 LOAD_16(cpu->prefetch[0], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); in ThumbWritePC()
71 cpu->gprs[ARM_PC] += WORD_SIZE_THUMB; in ThumbWritePC()
72 LOAD_16(cpu->prefetch[1], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); in ThumbWritePC()
[all …]
/dports/emulators/mgba/mgba-0.9.2/src/arm/
H A Darm.c136 cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - instructionWidth + WORD_SIZE_ARM; in ARMRaiseIRQ()
137 cpu->gprs[ARM_PC] = BASE_IRQ; in ARMRaiseIRQ()
155 cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - instructionWidth; in ARMRaiseSWI()
156 cpu->gprs[ARM_PC] = BASE_SWI; in ARMRaiseSWI()
173 cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - instructionWidth; in ARMRaiseUndefined()
174 cpu->gprs[ARM_PC] = BASE_UNDEF; in ARMRaiseUndefined()
203 cpu->gprs[ARM_PC] += WORD_SIZE_ARM; in ARMStep()
204 LOAD_32(cpu->prefetch[1], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); in ARMStep()
222 cpu->gprs[ARM_PC] += WORD_SIZE_THUMB; in ThumbStep()
254 cpu->gprs[ARM_PC] -= WORD_SIZE_ARM; in ARMRunFake()
[all …]
H A Disa-arm.c23 if (rm == ARM_PC) { in _shiftLSL()
58 if (rm == ARM_PC) { in _shiftLSR()
93 if (rm == ARM_PC) { in _shiftASR()
128 if (rm == ARM_PC) { in _shiftROR()
241 if (UNLIKELY(rn == ARM_PC)) { \
271 if (rd == ARM_PC) { \
296 if (rd == ARM_PC) { \
328 if (rd != ARM_PC) { \
341 if (rdHi != ARM_PC && rd != ARM_PC) { \
362 if (UNLIKELY(rd == ARM_PC)) { \
[all …]
/dports/games/libretro-mgba/mgba-6186d45/src/arm/
H A Darm.c160 cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - instructionWidth + WORD_SIZE_ARM; in ARMRaiseIRQ()
161 cpu->gprs[ARM_PC] = BASE_IRQ; in ARMRaiseIRQ()
179 cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - instructionWidth; in ARMRaiseSWI()
180 cpu->gprs[ARM_PC] = BASE_SWI; in ARMRaiseSWI()
197 cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - instructionWidth; in ARMRaiseUndefined()
198 cpu->gprs[ARM_PC] = BASE_UNDEF; in ARMRaiseUndefined()
208 cpu->gprs[ARM_PC] += WORD_SIZE_ARM; in ARMStep()
209 LOAD_32(cpu->prefetch[1], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); in ARMStep()
272 cpu->gprs[ARM_PC] += WORD_SIZE_THUMB; in ThumbStep()
304 cpu->gprs[ARM_PC] -= WORD_SIZE_ARM; in ARMRunFake()
[all …]
H A Disa-arm.c23 if (rs == ARM_PC) { in _shiftLSL()
28 if (rm == ARM_PC) { in _shiftLSL()
62 if (rs == ARM_PC) { in _shiftLSR()
67 if (rm == ARM_PC) { in _shiftLSR()
101 if (rs == ARM_PC) { in _shiftASR()
106 if (rm == ARM_PC) { in _shiftASR()
140 if (rs == ARM_PC) { in _shiftROR()
145 if (rm == ARM_PC) { in _shiftROR()
287 if (rd == ARM_PC) { \
309 if (rd == ARM_PC) { \
[all …]
H A Ddecoder-thumb.c125 if (info->op1.reg == ARM_PC) { \
167 DEFINE_IMMEDIATE_WITH_REGISTER_MEM_THUMB(LDR3, LDR, ARM_PC, LOAD_CYCLES, 1)
171 DEFINE_IMMEDIATE_WITH_REGISTER_DATA_THUMB(ADD5, ADD, ARM_PC)
201 if (info->op1.immediate & (1 << ARM_PC)) { \
250 DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB(POPR, ARM_SP, LDM, ARM_MEMORY_INCREMENT_AFTER, 1 << ARM_PC)
271 info->op2.reg = ARM_PC;
278 info->op1.reg = ARM_PC;
319 if (info1->op1.reg != ARM_LR || info1->op2.reg != ARM_PC) { in ARMDecodeThumbCombine()
322 if (info2->op1.reg != ARM_PC || info2->op2.reg != ARM_LR) { in ARMDecodeThumbCombine()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/ARM/
H A Darm-position-independence-jump-table.ll4 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
5 …e-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=ARM_PC
52 ; ARM_PC: ldr r[[R_OFFSET:[0-9]+]], [r[[R_TAB_BASE]], r{{[0-9]+}}, lsl #2]
53 ; ARM_PC: add pc, r[[R_TAB_BASE]], r[[R_OFFSET]]
59 ; ARM_PC: .long [[LBB1:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
60 ; ARM_PC: .long [[LBB2:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
61 ; ARM_PC: .long [[LBB3:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
62 ; ARM_PC: .long [[LBB4:\.LBB[0-9]+_[0-9]+]]-[[LJTI]]
/dports/emulators/mgba/mgba-0.9.2/src/gba/
H A Dserialize.c103 LOAD_32(pc, ARM_PC * sizeof(state->cpu.gprs[0]), state->cpu.gprs); in GBADeserialize()
128 LOAD_32(check, ARM_PC * sizeof(state->cpu.gprs[0]), state->cpu.gprs); in GBADeserialize()
157 if (gba->cpu->gprs[ARM_PC] & 1) { in GBADeserialize()
159 gba->cpu->gprs[ARM_PC] &= ~1; in GBADeserialize()
162 gba->cpu->memory.setActiveRegion(gba->cpu, gba->cpu->gprs[ARM_PC]); in GBADeserialize()
176 …LOAD_16(gba->cpu->prefetch[0], (gba->cpu->gprs[ARM_PC] - WORD_SIZE_THUMB) & gba->cpu->memory.activ… in GBADeserialize()
177 …LOAD_16(gba->cpu->prefetch[1], (gba->cpu->gprs[ARM_PC]) & gba->cpu->memory.activeMask, gba->cpu->m… in GBADeserialize()
186 …LOAD_32(gba->cpu->prefetch[0], (gba->cpu->gprs[ARM_PC] - WORD_SIZE_ARM) & gba->cpu->memory.activeM… in GBADeserialize()
187 …LOAD_32(gba->cpu->prefetch[1], (gba->cpu->gprs[ARM_PC]) & gba->cpu->memory.activeMask, gba->cpu->m… in GBADeserialize()
/dports/games/libretro-mgba/mgba-6186d45/src/gba/
H A Dserialize.c102 LOAD_32(pc, ARM_PC * sizeof(state->cpu.gprs[0]), state->cpu.gprs); in GBADeserialize()
127 LOAD_32(check, ARM_PC * sizeof(state->cpu.gprs[0]), state->cpu.gprs); in GBADeserialize()
156 if (gba->cpu->gprs[ARM_PC] & pcMask) { in GBADeserialize()
158 gba->cpu->gprs[ARM_PC] &= ~pcMask; in GBADeserialize()
160 gba->cpu->memory.setActiveRegion(gba->cpu, gba->cpu->gprs[ARM_PC]); in GBADeserialize()
174 …LOAD_16(gba->cpu->prefetch[0], (gba->cpu->gprs[ARM_PC] - WORD_SIZE_THUMB) & gba->cpu->memory.activ… in GBADeserialize()
175 …LOAD_16(gba->cpu->prefetch[1], (gba->cpu->gprs[ARM_PC]) & gba->cpu->memory.activeMask, gba->cpu->m… in GBADeserialize()
184 …LOAD_32(gba->cpu->prefetch[0], (gba->cpu->gprs[ARM_PC] - WORD_SIZE_ARM) & gba->cpu->memory.activeM… in GBADeserialize()
185 …LOAD_32(gba->cpu->prefetch[1], (gba->cpu->gprs[ARM_PC]) & gba->cpu->memory.activeMask, gba->cpu->m… in GBADeserialize()
/dports/emulators/mgba/mgba-0.9.2/src/arm/debugger/
H A Ddebugger.c111 destAddress = info.op1.immediate + cpu->gprs[ARM_PC]; in ARMDebuggerUpdateStackTraceInternal()
116 … isExceptionReturn = _ARMModeHasSPSR(cpu->cpsr.priv) && info.affectsCPSR && info.op1.reg == ARM_PC; in ARMDebuggerUpdateStackTraceInternal()
117 …bool isMovPcLr = (info.operandFormat & ARM_OPERAND_REGISTER_2) && info.op1.reg == ARM_PC && info.o… in ARMDebuggerUpdateStackTraceInternal()
125 if (isBranch || (info.op1.reg == ARM_PC && !isMovPcLr)) { in ARMDebuggerUpdateStackTraceInternal()
207 uint32_t pc = debugger->cpu->gprs[ARM_PC] - instructionLength; in ARMDebuggerCheckBreakpoints()
527 *value = cpu->gprs[ARM_PC]; in ARMDebuggerGetRegister()
542 if (reg <= ARM_PC) { in ARMDebuggerGetRegister()
563 cpu->gprs[ARM_PC] = value; in ARMDebuggerSetRegister()
574 if (reg > ARM_PC) { in ARMDebuggerSetRegister()
578 if (reg == ARM_PC) { in ARMDebuggerSetRegister()
[all …]
/dports/emulators/mgba/mgba-0.9.2/include/mgba/internal/arm/
H A Disa-inlines.h59 uint32_t pc = cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB; in ARMWritePC()
64 cpu->gprs[ARM_PC] = pc; in ARMWritePC()
69 uint32_t pc = cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB; in ThumbWritePC()
74 cpu->gprs[ARM_PC] = pc; in ThumbWritePC()
111 return cpu->gprs[ARM_PC] - _ARMInstructionLength(cpu) * 2; in _ARMPCAddress()

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