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Searched refs:ARMul_ResetV (Results 1 – 25 of 26) sorted by relevance

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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Darminit.c293 case ARMul_ResetV: /* RESET */ in ARMul_Abort()
337 case ARMul_ResetV: state->EndCondition = RDIError_Reset; break; in ARMul_Abort()
H A Darmos.c171 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4) in ARMul_OSInit()
177 for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4) in ARMul_OSInit()
H A Darmdefs.h192 #define ARMul_ResetV ARMResetV macro
H A Dwrapper.c282 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
H A Darmsupp.c719 ARMul_Abort (state, ARMul_ResetV); in IntPending()
H A Darmemu.c401 ARMul_Abort (state, ARMul_ResetV); in ARMul_Emulate32()
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Darminit.c293 case ARMul_ResetV: /* RESET */ in ARMul_Abort()
337 case ARMul_ResetV: state->EndCondition = RDIError_Reset; break; in ARMul_Abort()
H A Darmos.c171 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4) in ARMul_OSInit()
177 for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4) in ARMul_OSInit()
H A Darmdefs.h192 #define ARMul_ResetV ARMResetV macro
H A Dwrapper.c282 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
H A Darmsupp.c719 ARMul_Abort (state, ARMul_ResetV); in IntPending()
/dports/devel/avr-gdb/gdb-7.3.1/sim/arm/
H A Darminit.c297 case ARMul_ResetV: /* RESET */ in ARMul_Abort()
341 case ARMul_ResetV: state->EndCondition = RDIError_Reset; break; in ARMul_Abort()
H A Darmos.c171 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4) in ARMul_OSInit()
177 for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4) in ARMul_OSInit()
H A Darmdefs.h205 #define ARMul_ResetV ARMResetV macro
H A Dwrapper.c281 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
H A Darmsupp.c719 ARMul_Abort (state, ARMul_ResetV); in IntPending()
H A Darmemu.c606 ARMul_Abort (state, ARMul_ResetV); in ARMul_Emulate32()
/dports/devel/gdb761/gdb-7.6.1/sim/arm/
H A Darminit.c296 case ARMul_ResetV: /* RESET */ in ARMul_Abort()
340 case ARMul_ResetV: state->EndCondition = RDIError_Reset; break; in ARMul_Abort()
H A Darmos.c170 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4) in ARMul_OSInit()
176 for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4) in ARMul_OSInit()
H A Darmdefs.h204 #define ARMul_ResetV ARMResetV macro
H A Dwrapper.c283 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
H A Darmsupp.c718 ARMul_Abort (state, ARMul_ResetV); in IntPending()
H A Darmemu.c605 ARMul_Abort (state, ARMul_ResetV); in ARMul_Emulate32()
/dports/emulators/citra/citra-ac98458e0/src/core/arm/skyeye_common/
H A Darmstate.h79 ARMul_ResetV = ARMResetV, enumerator
/dports/emulators/citra-qt5/citra-ac98458e0/src/core/arm/skyeye_common/
H A Darmstate.h79 ARMul_ResetV = ARMResetV, enumerator

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