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Searched refs:ARMul_UndefinedInstrV (Results 1 – 22 of 22) sorted by relevance

/dports/devel/avr-gdb/gdb-7.3.1/sim/arm/
H A Darmsupp.c620 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MCR()
656 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MRC()
696 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_CDP()
706 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_UndefInstr()
H A Darminit.c300 case ARMul_UndefinedInstrV: /* Undefined Instruction */ in ARMul_Abort()
342 case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break; in ARMul_Abort()
H A Darmdefs.h206 #define ARMul_UndefinedInstrV ARMUndefinedInstrV macro
H A Darmemu.h242 ARMul_Abort (state, ARMul_UndefinedInstrV); \
H A Diwmmxt.c3697 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_HandleIwmmxt()
/dports/devel/gdb761/gdb-7.6.1/sim/arm/
H A Darmsupp.c619 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MCR()
655 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MRC()
695 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_CDP()
705 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_UndefInstr()
H A Darminit.c299 case ARMul_UndefinedInstrV: /* Undefined Instruction */ in ARMul_Abort()
341 case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break; in ARMul_Abort()
H A Darmdefs.h205 #define ARMul_UndefinedInstrV ARMUndefinedInstrV macro
H A Darmemu.h241 ARMul_Abort (state, ARMul_UndefinedInstrV); \
H A Diwmmxt.c3699 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_HandleIwmmxt()
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Darmsupp.c620 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MCR()
656 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MRC()
696 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_CDP()
706 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_UndefInstr()
H A Darminit.c296 case ARMul_UndefinedInstrV: /* Undefined Instruction */ in ARMul_Abort()
338 case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break; in ARMul_Abort()
H A Darmdefs.h193 #define ARMul_UndefinedInstrV ARMUndefinedInstrV macro
H A Darmemu.h242 ARMul_Abort (state, ARMul_UndefinedInstrV); \
H A Diwmmxt.c3695 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_HandleIwmmxt()
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Darmsupp.c620 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MCR()
656 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_MRC()
696 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_CDP()
706 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_UndefInstr()
H A Darminit.c296 case ARMul_UndefinedInstrV: /* Undefined Instruction */ in ARMul_Abort()
338 case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break; in ARMul_Abort()
H A Darmdefs.h193 #define ARMul_UndefinedInstrV ARMUndefinedInstrV macro
H A Darmemu.h242 ARMul_Abort (state, ARMul_UndefinedInstrV); \
H A Diwmmxt.c3695 ARMul_Abort (state, ARMul_UndefinedInstrV); in ARMul_HandleIwmmxt()
/dports/emulators/citra/citra-ac98458e0/src/core/arm/skyeye_common/
H A Darmstate.h80 ARMul_UndefinedInstrV = ARMUndefinedInstrV, enumerator
/dports/emulators/citra-qt5/citra-ac98458e0/src/core/arm/skyeye_common/
H A Darmstate.h80 ARMul_UndefinedInstrV = ARMUndefinedInstrV, enumerator