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Searched refs:AR_SIZE (Results 1 – 23 of 23) sorted by relevance

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tests/
H A Dtest-vmstate.c488 #define AR_SIZE 4 macro
491 TestStructTriv *ar[AR_SIZE];
525 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
532 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
558 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
565 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
569 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
579 int32_t *ar[AR_SIZE];
595 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
605 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
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/dports/emulators/qemu42/qemu-4.2.1/tests/
H A Dtest-vmstate.c537 #define AR_SIZE 4 macro
540 TestStructTriv *ar[AR_SIZE];
574 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
581 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
607 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
614 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
618 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
628 int32_t *ar[AR_SIZE];
644 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
654 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
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/dports/emulators/qemu-utils/qemu-4.2.1/tests/
H A Dtest-vmstate.c537 #define AR_SIZE 4 macro
540 TestStructTriv *ar[AR_SIZE];
574 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
581 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
607 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
614 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
618 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
628 int32_t *ar[AR_SIZE];
644 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
654 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
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/dports/emulators/qemu5/qemu-5.2.0/tests/
H A Dtest-vmstate.c536 #define AR_SIZE 4 macro
539 TestStructTriv *ar[AR_SIZE];
573 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
580 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
606 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
613 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
617 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
627 int32_t *ar[AR_SIZE];
643 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
653 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/tests/
H A Dtest-vmstate.c537 #define AR_SIZE 4 macro
540 TestStructTriv *ar[AR_SIZE];
574 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
581 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
607 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
614 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
618 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
628 int32_t *ar[AR_SIZE];
644 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
654 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tests/unit/
H A Dtest-vmstate.c538 #define AR_SIZE 4 macro
541 TestStructTriv *ar[AR_SIZE];
575 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
582 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
608 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
615 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
619 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
629 int32_t *ar[AR_SIZE];
645 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
655 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
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/dports/emulators/qemu/qemu-6.2.0/tests/unit/
H A Dtest-vmstate.c538 #define AR_SIZE 4 macro
541 TestStructTriv *ar[AR_SIZE];
575 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
582 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
608 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
615 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
619 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
629 int32_t *ar[AR_SIZE];
645 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
655 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tests/
H A Dtest-vmstate.c537 #define AR_SIZE 4 macro
540 TestStructTriv *ar[AR_SIZE];
574 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
581 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
607 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
614 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
618 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
628 int32_t *ar[AR_SIZE];
644 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
654 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/tests/unit/
H A Dtest-vmstate.c536 #define AR_SIZE 4 macro
539 TestStructTriv *ar[AR_SIZE];
573 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
580 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
606 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
613 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
617 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
627 int32_t *ar[AR_SIZE];
643 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
653 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
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/dports/devel/bmake/bmake/
H A Darch.c186 #ifndef AR_SIZE
187 # define AR_SIZE ar_size macro
554 arh.AR_SIZE[sizeof arh.AR_SIZE - 1] = '\0'; in ArchStatMember()
555 size = (size_t)strtol(arh.AR_SIZE, NULL, 10); in ArchStatMember()
872 out_arh->AR_SIZE[sizeof out_arh->AR_SIZE - 1] = '\0'; in ArchFindMember()
873 size = (int)strtol(out_arh->AR_SIZE, NULL, 10); in ArchFindMember()
/dports/games/freeciv-nox11/freeciv-2.6.6/common/
H A Dtech.c122 fc_assert_ret_val(require >= 0 && require < AR_SIZE, -1); in advance_required()
137 fc_assert_ret_val(require >= 0 && require < AR_SIZE, NULL); in advance_requires()
459 for (req = AR_ONE; req < AR_SIZE; req++) { in advance_req_iter_next()
551 for (req = AR_ONE; req < AR_SIZE; req++) { in advance_root_req_iter_next()
H A Dtech.h113 AR_SIZE enumerator
122 struct advance *require[AR_SIZE];
H A Dresearch.c316 for (req = 0; req < AR_SIZE; req++) { in research_get_reachable()
/dports/games/freeciv/freeciv-2.6.6/common/
H A Dtech.c122 fc_assert_ret_val(require >= 0 && require < AR_SIZE, -1); in advance_required()
137 fc_assert_ret_val(require >= 0 && require < AR_SIZE, NULL); in advance_requires()
459 for (req = AR_ONE; req < AR_SIZE; req++) { in advance_req_iter_next()
551 for (req = AR_ONE; req < AR_SIZE; req++) { in advance_root_req_iter_next()
H A Dtech.h113 AR_SIZE enumerator
122 struct advance *require[AR_SIZE];
H A Dresearch.c316 for (req = 0; req < AR_SIZE; req++) { in research_get_reachable()
/dports/games/freeciv/freeciv-2.6.6/tools/ruledit/
H A Dtab_tech.cpp154 case AR_SIZE: in prepare_req_button()
155 fc_assert(rn != AR_SIZE); in prepare_req_button()
/dports/games/freeciv-nox11/freeciv-2.6.6/tools/ruledit/
H A Dtab_tech.cpp154 case AR_SIZE: in prepare_req_button()
155 fc_assert(rn != AR_SIZE); in prepare_req_button()
/dports/math/gap/gap-4.11.0/src/hpc/
H A Daobjects.c472 AR_SIZE = 2, enumerator
568 size = table[AR_SIZE].atom; in PrintAtomicRecord()
665 table[AR_SIZE].atom++; /* increase size */ in ARecordFastInsert()
731 size = table[AR_SIZE].atom + 1; in SetARecordField()
733 } while (have_room && !COMPARE_AND_SWAP(&table[AR_SIZE].atom, in SetARecordField()
742 size = table[AR_SIZE].atom; in SetARecordField()
743 } while (!COMPARE_AND_SWAP(&table[AR_SIZE].atom, size, size-1)); in SetARecordField()
799 newtable[AR_SIZE].atom = 0; /* size */ in SetARecordField()
881 table[AR_SIZE].atom = 0; in NewAtomicRecord()
/dports/databases/grass7/grass-7.8.6/raster/r.watershed/ram/
H A DGwater.h19 #define AR_SIZE 16 macro
/dports/databases/grass7/grass-7.8.6/raster/r.watershed/seg/
H A DGwater.h19 #define AR_SIZE 16 macro
/dports/games/freeciv-nox11/freeciv-2.6.6/server/
H A Drssanity.c558 for (i = AR_ONE; i < AR_SIZE; i++) { in sanity_check_ruleset_data()
/dports/games/freeciv/freeciv-2.6.6/server/
H A Drssanity.c558 for (i = AR_ONE; i < AR_SIZE; i++) { in sanity_check_ruleset_data()