Home
last modified time | relevance | path

Searched refs:ATMEL_BASE_DDRCS (Results 1 – 25 of 694) sorted by relevance

12345678910>>...28

/dports/sysutils/u-boot-tools/u-boot-2020.07/include/configs/
H A Dwb50n.h37 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/configs/
H A Dwb50n.h39 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/configs/
H A Dwb50n.h39 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/configs/
H A Dwb50n.h39 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/configs/
H A Dwb50n.h39 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/include/configs/
H A Dwb50n.h39 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
/dports/sysutils/u-boot-utilite/u-boot-2015.07/include/configs/
H A Dsama5d3_xplained.h36 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c159 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c163 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c163 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c163 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c159 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c163 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c163 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c163 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/atmel/sama5d27_som1_ek/
H A Dsama5d27_som1_ek.c163 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); in mem_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-at91/include/mach/
H A Dsama5d3.h176 #define ATMEL_BASE_DDRCS 0x20000000 macro

12345678910>>...28