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Searched refs:A_MPS_CFG (Results 1 – 12 of 12) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/chelsio/cxgb3/
H A Dxgmac.c158 t3_set_reg_field(adap, A_MPS_CFG, F_PORT0ACTIVE, 0); in t3b2_mac_reset()
160 t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0); in t3b2_mac_reset()
163 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 0); in t3b2_mac_reset()
214 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE); in t3b2_mac_reset()
216 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE); in t3b2_mac_reset()
219 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1); in t3b2_mac_reset()
222 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1); in t3b2_mac_reset()
H A Dt3_hw.c3105 t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT | in chan_init_hw()
3115 t3_write_reg(adap, A_MPS_CFG, F_TPTXPORT0EN | F_TPTXPORT1EN | in chan_init_hw()
H A Dregs.h1734 #define A_MPS_CFG 0x600 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/chelsio/cxgb3/
H A Dxgmac.c158 t3_set_reg_field(adap, A_MPS_CFG, F_PORT0ACTIVE, 0); in t3b2_mac_reset()
160 t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0); in t3b2_mac_reset()
163 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 0); in t3b2_mac_reset()
214 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE); in t3b2_mac_reset()
216 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE); in t3b2_mac_reset()
219 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1); in t3b2_mac_reset()
222 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1); in t3b2_mac_reset()
H A Dt3_hw.c3105 t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT | in chan_init_hw()
3115 t3_write_reg(adap, A_MPS_CFG, F_TPTXPORT0EN | F_TPTXPORT1EN | in chan_init_hw()
H A Dregs.h1734 #define A_MPS_CFG 0x600 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/chelsio/cxgb3/
H A Dxgmac.c158 t3_set_reg_field(adap, A_MPS_CFG, F_PORT0ACTIVE, 0); in t3b2_mac_reset()
160 t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0); in t3b2_mac_reset()
163 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 0); in t3b2_mac_reset()
214 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE); in t3b2_mac_reset()
216 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE); in t3b2_mac_reset()
219 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1); in t3b2_mac_reset()
222 t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1); in t3b2_mac_reset()
H A Dt3_hw.c3105 t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT | in chan_init_hw()
3115 t3_write_reg(adap, A_MPS_CFG, F_TPTXPORT0EN | F_TPTXPORT1EN | in chan_init_hw()
H A Dregs.h1734 #define A_MPS_CFG 0x600 macro
/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/pci/cxgb/
H A Dcxgb_xgmac.c177 t3_set_reg_field(adap, A_MPS_CFG, F_PORT0ACTIVE, 0); in t3b2_mac_reset()
179 t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0); in t3b2_mac_reset()
217 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE); in t3b2_mac_reset()
219 t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE); in t3b2_mac_reset()
H A Dcxgb_t3_hw.c3137 t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE | F_PORT0ACTIVE, in t3_mps_set_active_ports()
3157 t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT | in chan_init_hw()
3172 t3_write_reg(adap, A_MPS_CFG, F_TPTXPORT0EN | F_TPTXPORT1EN | in chan_init_hw()
3814 t3_set_reg_field(adapter, A_MPS_CFG, F_PORT0ACTIVE | F_PORT1ACTIVE, in t3_port_failover()
3820 t3_set_reg_field(adapter, A_MPS_CFG, F_PORT0ACTIVE | F_PORT1ACTIVE, in t3_failover_done()
3826 t3_set_reg_field(adapter, A_MPS_CFG, F_PORT0ACTIVE | F_PORT1ACTIVE, in t3_failover_clear()
H A Dcxgb_regs.h5117 #define A_MPS_CFG 0x600 macro