| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 987 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
990 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
999 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
1004 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
1023 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
1026 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1029 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1032 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 91 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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| H A D | AMDGPULegalizerInfo.cpp | 2695 const TargetRegisterClass *ArgRC, in loadInputValue() argument
2701 Register LiveIn = getFunctionLiveInPhysReg(B.getMF(), B.getTII(), SrcReg, *ArgRC, in loadInputValue()
2729 const TargetRegisterClass *ArgRC; in loadInputValue() local
2731 std::tie(Arg, ArgRC, ArgTy) = MFI->getPreloadedValue(ArgType); in loadInputValue()
2735 return loadInputValue(DstReg, B, Arg, ArgRC, ArgTy); in loadInputValue()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 784 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
787 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
796 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
801 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
820 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
823 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
826 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
829 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 95 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 784 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
787 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
796 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
801 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
820 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
823 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
826 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
829 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 95 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 784 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
787 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
796 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
801 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
820 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
823 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
826 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
829 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 95 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 800 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
807 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
816 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
821 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
840 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
843 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
846 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
849 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 97 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 784 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
787 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
796 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
801 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
820 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
823 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
826 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
829 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 95 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 784 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
787 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
796 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
801 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
820 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
823 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
826 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
829 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 95 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 1065 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
1068 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1077 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
1082 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
1101 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
1104 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1107 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1110 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 95 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 1065 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
1068 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1077 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
1082 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
1101 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
1104 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1107 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
1110 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
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| H A D | AMDGPULegalizerInfo.h | 95 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2440 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2450 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
2453 EVT ArgVT = TRI->getSpillSize(*ArgRC) == 8 ? MVT::i64 : MVT::i32; in passSpecialInputs()
2457 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2478 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2480 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2483 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2486 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2503 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2506 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
[all …]
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| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2584 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2587 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
2597 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
2600 EVT ArgVT = TRI->getSpillSize(*ArgRC) == 8 ? MVT::i64 : MVT::i32; in passSpecialInputs()
2604 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2628 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2631 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
2634 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
2637 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
2654 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
[all …]
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| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2479 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2489 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
2492 EVT ArgVT = TRI->getSpillSize(*ArgRC) == 8 ? MVT::i64 : MVT::i32; in passSpecialInputs()
2496 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2517 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2519 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2522 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2525 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2542 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2545 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
[all …]
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| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2584 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2587 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
2597 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
2600 EVT ArgVT = TRI->getSpillSize(*ArgRC) == 8 ? MVT::i64 : MVT::i32; in passSpecialInputs()
2604 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2628 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2631 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
2634 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
2637 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
2654 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
[all …]
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2479 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2489 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
2492 EVT ArgVT = TRI->getSpillSize(*ArgRC) == 8 ? MVT::i64 : MVT::i32; in passSpecialInputs()
2496 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2517 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2519 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2522 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2525 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2542 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2545 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
[all …]
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2479 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2489 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
2492 EVT ArgVT = TRI->getSpillSize(*ArgRC) == 8 ? MVT::i64 : MVT::i32; in passSpecialInputs()
2496 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2517 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
2519 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2522 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2525 std::tie(OutgoingArg, ArgRC) = in passSpecialInputs()
2542 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2545 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
[all …]
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