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Searched refs:B2TT_4 (Results 1 – 14 of 14) sorted by relevance

/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Debiu.h128 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/
H A DdefBF532.h1293 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
H A DdefBF561.h1666 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro
H A DdefBF51x_base.h1471 #define B2TT_4 0x00000000 /* B2 Transition Time (Read to Write) = 4 cycles */ macro
H A DdefBF52x_base.h1420 #define B2TT_4 0x00000000 /* B2 Transition Time (Read to Write) = 4 cycles */ macro
H A DdefBF534.h1696 #define B2TT_4 0x00000000 /* B2 Transition Time (Read to Write) = 4 cycles */ macro
H A DdefBF539.h2464 #define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */ macro