| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/panfrost/ |
| H A D | panfrost_features.h | 48 BIT_ULL(HW_FEATURE_V4))
55 BIT_ULL(HW_FEATURE_V4))
66 BIT_ULL(HW_FEATURE_V4))
79 BIT_ULL(HW_FEATURE_MRT) | \
98 BIT_ULL(HW_FEATURE_MRT) | \
121 BIT_ULL(HW_FEATURE_MRT) | \
141 BIT_ULL(HW_FEATURE_MRT) | \
161 BIT_ULL(HW_FEATURE_MRT) | \
185 BIT_ULL(HW_FEATURE_MRT) | \
210 BIT_ULL(HW_FEATURE_MRT) | \
[all …]
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| H A D | panfrost_issues.h | 132 BIT_ULL(HW_ISSUE_9435))
135 BIT_ULL(HW_ISSUE_6367) | \
136 BIT_ULL(HW_ISSUE_6787) | \
137 BIT_ULL(HW_ISSUE_8408) | \
138 BIT_ULL(HW_ISSUE_9510) | \
148 BIT_ULL(HW_ISSUE_8186) | \
149 BIT_ULL(HW_ISSUE_8245) | \
150 BIT_ULL(HW_ISSUE_8316) | \
157 BIT_ULL(GPUCORE_1619))
172 BIT_ULL(HW_ISSUE_11035))
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/panfrost/ |
| H A D | panfrost_features.h | 48 BIT_ULL(HW_FEATURE_V4))
55 BIT_ULL(HW_FEATURE_V4))
66 BIT_ULL(HW_FEATURE_V4))
79 BIT_ULL(HW_FEATURE_MRT) | \
98 BIT_ULL(HW_FEATURE_MRT) | \
121 BIT_ULL(HW_FEATURE_MRT) | \
141 BIT_ULL(HW_FEATURE_MRT) | \
161 BIT_ULL(HW_FEATURE_MRT) | \
185 BIT_ULL(HW_FEATURE_MRT) | \
210 BIT_ULL(HW_FEATURE_MRT) | \
[all …]
|
| H A D | panfrost_issues.h | 132 BIT_ULL(HW_ISSUE_9435))
135 BIT_ULL(HW_ISSUE_6367) | \
136 BIT_ULL(HW_ISSUE_6787) | \
137 BIT_ULL(HW_ISSUE_8408) | \
138 BIT_ULL(HW_ISSUE_9510) | \
148 BIT_ULL(HW_ISSUE_8186) | \
149 BIT_ULL(HW_ISSUE_8245) | \
150 BIT_ULL(HW_ISSUE_8316) | \
157 BIT_ULL(GPUCORE_1619))
172 BIT_ULL(HW_ISSUE_11035))
[all …]
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/panfrost/ |
| H A D | panfrost_features.h | 48 BIT_ULL(HW_FEATURE_V4))
55 BIT_ULL(HW_FEATURE_V4))
66 BIT_ULL(HW_FEATURE_V4))
79 BIT_ULL(HW_FEATURE_MRT) | \
98 BIT_ULL(HW_FEATURE_MRT) | \
121 BIT_ULL(HW_FEATURE_MRT) | \
141 BIT_ULL(HW_FEATURE_MRT) | \
161 BIT_ULL(HW_FEATURE_MRT) | \
185 BIT_ULL(HW_FEATURE_MRT) | \
210 BIT_ULL(HW_FEATURE_MRT) | \
[all …]
|
| H A D | panfrost_issues.h | 132 BIT_ULL(HW_ISSUE_9435))
135 BIT_ULL(HW_ISSUE_6367) | \
136 BIT_ULL(HW_ISSUE_6787) | \
137 BIT_ULL(HW_ISSUE_8408) | \
138 BIT_ULL(HW_ISSUE_9510) | \
148 BIT_ULL(HW_ISSUE_8186) | \
149 BIT_ULL(HW_ISSUE_8245) | \
150 BIT_ULL(HW_ISSUE_8316) | \
157 BIT_ULL(GPUCORE_1619))
172 BIT_ULL(HW_ISSUE_11035))
[all …]
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/mmc/host/ |
| H A D | cavium.h | 134 #define MIO_EMM_CMD_VAL BIT_ULL(59)
135 #define MIO_EMM_CMD_DBUF BIT_ULL(55)
144 #define MIO_EMM_DMA_VAL BIT_ULL(59)
145 #define MIO_EMM_DMA_SECTOR BIT_ULL(58)
148 #define MIO_EMM_DMA_REL_WR BIT_ULL(50)
149 #define MIO_EMM_DMA_RW BIT_ULL(49)
150 #define MIO_EMM_DMA_MULTI BIT_ULL(48)
154 #define MIO_EMM_DMA_CFG_EN BIT_ULL(63)
155 #define MIO_EMM_DMA_CFG_RW BIT_ULL(62)
166 #define MIO_EMM_INT_DMA_ERR BIT_ULL(4)
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/mmc/host/ |
| H A D | cavium.h | 134 #define MIO_EMM_CMD_VAL BIT_ULL(59)
135 #define MIO_EMM_CMD_DBUF BIT_ULL(55)
144 #define MIO_EMM_DMA_VAL BIT_ULL(59)
145 #define MIO_EMM_DMA_SECTOR BIT_ULL(58)
148 #define MIO_EMM_DMA_REL_WR BIT_ULL(50)
149 #define MIO_EMM_DMA_RW BIT_ULL(49)
150 #define MIO_EMM_DMA_MULTI BIT_ULL(48)
154 #define MIO_EMM_DMA_CFG_EN BIT_ULL(63)
155 #define MIO_EMM_DMA_CFG_RW BIT_ULL(62)
166 #define MIO_EMM_INT_DMA_ERR BIT_ULL(4)
[all …]
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/mmc/host/ |
| H A D | cavium.h | 134 #define MIO_EMM_CMD_VAL BIT_ULL(59)
135 #define MIO_EMM_CMD_DBUF BIT_ULL(55)
144 #define MIO_EMM_DMA_VAL BIT_ULL(59)
145 #define MIO_EMM_DMA_SECTOR BIT_ULL(58)
148 #define MIO_EMM_DMA_REL_WR BIT_ULL(50)
149 #define MIO_EMM_DMA_RW BIT_ULL(49)
150 #define MIO_EMM_DMA_MULTI BIT_ULL(48)
154 #define MIO_EMM_DMA_CFG_EN BIT_ULL(63)
155 #define MIO_EMM_DMA_CFG_RW BIT_ULL(62)
166 #define MIO_EMM_INT_DMA_ERR BIT_ULL(4)
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/include/asm/ |
| H A D | cpu.h | 366 #define MIPS_CPU_TLB BIT_ULL( 0) /* CPU has TLB */
367 #define MIPS_CPU_4KEX BIT_ULL( 1) /* "R4K" exception model */
368 #define MIPS_CPU_3K_CACHE BIT_ULL( 2) /* R3000-style caches */
369 #define MIPS_CPU_4K_CACHE BIT_ULL( 3) /* R4000-style caches */
371 #define MIPS_CPU_FPU BIT_ULL( 5) /* CPU has FPU */
380 #define MIPS_CPU_EJTAG BIT_ULL(14) /* EJTAG exception */
381 #define MIPS_CPU_NOFPUEX BIT_ULL(15) /* no FPU exception */
387 #define MIPS_CPU_ULRI BIT_ULL(21) /* CPU has ULRI feature */
408 #define MIPS_CPU_EBASE_WG BIT_ULL(43) /* CPU has EBase.WG */
420 BIT_ULL(54) /* CPU shares FTLB RAM with another */
[all …]
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/include/asm/ |
| H A D | cpu.h | 366 #define MIPS_CPU_TLB BIT_ULL( 0) /* CPU has TLB */
367 #define MIPS_CPU_4KEX BIT_ULL( 1) /* "R4K" exception model */
368 #define MIPS_CPU_3K_CACHE BIT_ULL( 2) /* R3000-style caches */
369 #define MIPS_CPU_4K_CACHE BIT_ULL( 3) /* R4000-style caches */
371 #define MIPS_CPU_FPU BIT_ULL( 5) /* CPU has FPU */
380 #define MIPS_CPU_EJTAG BIT_ULL(14) /* EJTAG exception */
381 #define MIPS_CPU_NOFPUEX BIT_ULL(15) /* no FPU exception */
387 #define MIPS_CPU_ULRI BIT_ULL(21) /* CPU has ULRI feature */
408 #define MIPS_CPU_EBASE_WG BIT_ULL(43) /* CPU has EBase.WG */
420 BIT_ULL(54) /* CPU shares FTLB RAM with another */
[all …]
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/include/asm/ |
| H A D | cpu.h | 366 #define MIPS_CPU_TLB BIT_ULL( 0) /* CPU has TLB */
367 #define MIPS_CPU_4KEX BIT_ULL( 1) /* "R4K" exception model */
368 #define MIPS_CPU_3K_CACHE BIT_ULL( 2) /* R3000-style caches */
369 #define MIPS_CPU_4K_CACHE BIT_ULL( 3) /* R4000-style caches */
371 #define MIPS_CPU_FPU BIT_ULL( 5) /* CPU has FPU */
380 #define MIPS_CPU_EJTAG BIT_ULL(14) /* EJTAG exception */
381 #define MIPS_CPU_NOFPUEX BIT_ULL(15) /* no FPU exception */
387 #define MIPS_CPU_ULRI BIT_ULL(21) /* CPU has ULRI feature */
408 #define MIPS_CPU_EBASE_WG BIT_ULL(43) /* CPU has EBase.WG */
420 BIT_ULL(54) /* CPU shares FTLB RAM with another */
[all …]
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/cavium/thunder/ |
| H A D | thunder_bgx.h | 36 #define CMR_PKT_TX_EN BIT_ULL(13)
37 #define CMR_PKT_RX_EN BIT_ULL(14)
38 #define CMR_EN BIT_ULL(15)
57 #define RX_DMACX_CAM_EN BIT_ULL(48)
89 #define SPU_CTL_RESET BIT_ULL(15)
141 #define SMU_CTL_RX_IDLE BIT_ULL(0)
142 #define SMU_CTL_TX_IDLE BIT_ULL(1)
144 #define RX_EN BIT_ULL(0)
145 #define TX_EN BIT_ULL(1)
146 #define BCK_EN BIT_ULL(2)
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/cavium/thunder/ |
| H A D | thunder_bgx.h | 36 #define CMR_PKT_TX_EN BIT_ULL(13)
37 #define CMR_PKT_RX_EN BIT_ULL(14)
38 #define CMR_EN BIT_ULL(15)
57 #define RX_DMACX_CAM_EN BIT_ULL(48)
89 #define SPU_CTL_RESET BIT_ULL(15)
141 #define SMU_CTL_RX_IDLE BIT_ULL(0)
142 #define SMU_CTL_TX_IDLE BIT_ULL(1)
144 #define RX_EN BIT_ULL(0)
145 #define TX_EN BIT_ULL(1)
146 #define BCK_EN BIT_ULL(2)
[all …]
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/cavium/thunder/ |
| H A D | thunder_bgx.h | 36 #define CMR_PKT_TX_EN BIT_ULL(13)
37 #define CMR_PKT_RX_EN BIT_ULL(14)
38 #define CMR_EN BIT_ULL(15)
57 #define RX_DMACX_CAM_EN BIT_ULL(48)
89 #define SPU_CTL_RESET BIT_ULL(15)
141 #define SMU_CTL_RX_IDLE BIT_ULL(0)
142 #define SMU_CTL_TX_IDLE BIT_ULL(1)
144 #define RX_EN BIT_ULL(0)
145 #define TX_EN BIT_ULL(1)
146 #define BCK_EN BIT_ULL(2)
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/net/octeontx/ |
| H A D | bgx.h | 44 #define CMR_PKT_TX_EN BIT_ULL(13)
45 #define CMR_PKT_RX_EN BIT_ULL(14)
46 #define CMR_EN BIT_ULL(15)
64 #define RX_DMACX_CAM_EN BIT_ULL(48)
93 #define SPU_CTL_LOW_POWER BIT_ULL(11)
95 #define SPU_CTL_RESET BIT_ULL(15)
114 #define SPU_AN_CTL_AN_EN BIT_ULL(12)
140 #define SMU_TX_CTL_DIC_EN BIT_ULL(0)
141 #define SMU_TX_CTL_UNI_EN BIT_ULL(1)
145 #define SMU_CTL_RX_IDLE BIT_ULL(0)
[all …]
|