| /dports/graphics/cairo/cairo-1.17.4/src/drm/ |
| H A D | cairo-drm-intel-brw-defines.h | 596 #define BRW_ARF_MASK 0x40 macro
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| H A D | cairo-drm-intel-brw-eu.h | 575 BRW_ARF_MASK, in brw_mask_reg()
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| /dports/www/firefox-esr/firefox-91.8.0/gfx/cairo/cairo/src/drm/ |
| H A D | cairo-drm-intel-brw-defines.h | 596 #define BRW_ARF_MASK 0x40 macro
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| H A D | cairo-drm-intel-brw-eu.h | 575 BRW_ARF_MASK, in brw_mask_reg()
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| /dports/www/firefox/firefox-99.0/gfx/cairo/cairo/src/drm/ |
| H A D | cairo-drm-intel-brw-defines.h | 596 #define BRW_ARF_MASK 0x40 macro
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| H A D | cairo-drm-intel-brw-eu.h | 575 BRW_ARF_MASK, in brw_mask_reg()
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| /dports/mail/thunderbird/thunderbird-91.8.0/gfx/cairo/cairo/src/drm/ |
| H A D | cairo-drm-intel-brw-defines.h | 596 #define BRW_ARF_MASK 0x40 macro
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| /dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/xvmc/ |
| H A D | brw_defines.h | 653 #define BRW_ARF_MASK 0x40 macro
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| /dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/uxa/ |
| H A D | brw_defines.h | 653 #define BRW_ARF_MASK 0x40 macro
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 986 #define BRW_ARF_MASK 0x40 macro
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| H A D | brw_reg.h | 927 return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_MASK, subnr); in brw_mask_reg()
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| /dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/sna/brw/ |
| H A D | brw_eu.h | 281 #define BRW_ARF_MASK 0x40 macro
1621 BRW_ARF_MASK, in brw_mask_reg()
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| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| H A D | brw_reg.h | 919 return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_MASK, subnr); in brw_mask_reg()
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| /dports/lang/clover/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| H A D | brw_reg.h | 919 return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_MASK, subnr); in brw_mask_reg()
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| /dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| H A D | brw_reg.h | 919 return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_MASK, subnr); in brw_mask_reg()
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1049 #define BRW_ARF_MASK 0x40 macro
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 1016 #define BRW_ARF_MASK 0x40 macro
|