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Searched refs:BRW_REGISTER_TYPE_VF (Results 1 – 25 of 200) sorted by relevance

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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GEN11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GEN12_HW_REG_TYPE_FLOAT(0) },
469 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
502 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
352 case BRW_REGISTER_TYPE_VF: in get_exec_type()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
755 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
H A Dbrw_reg_type.h52 BRW_REGISTER_TYPE_VF, enumerator
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
H A Dbrw_reg_type.h52 BRW_REGISTER_TYPE_VF, /* 32-bit vector of 4 8-bit floats */ enumerator
/dports/lang/clover/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c98 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
111 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
126 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
142 [BRW_REGISTER_TYPE_VF] = { INVALID, BRW_HW_IMM_TYPE_VF },
160 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX11_HW_IMM_TYPE_VF },
175 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
191 [BRW_REGISTER_TYPE_VF] = { INVALID, GFX12_HW_REG_TYPE_FLOAT(0) },
512 [BRW_REGISTER_TYPE_VF] = 4, in brw_reg_type_to_size()
545 [BRW_REGISTER_TYPE_VF] = "VF", in brw_reg_type_to_letters()
H A Dbrw_reg.h275 case BRW_REGISTER_TYPE_VF: in brw_regs_negative_equal()
326 case BRW_REGISTER_TYPE_VF: in type_sz()
353 case BRW_REGISTER_TYPE_VF: in get_exec_type()
739 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
747 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/sna/brw/
H A Dbrw_eu.h272 #define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ macro
1492 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf()
1509 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); in brw_imm_vf4()
1981 src0.type == BRW_REGISTER_TYPE_VF)) { in brw_ADD()
1988 src1.type == BRW_REGISTER_TYPE_VF)) { in brw_ADD()
2011 src0.type == BRW_REGISTER_TYPE_VF)) { in brw_MUL()
2018 src1.type == BRW_REGISTER_TYPE_VF)) { in brw_MUL()

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