/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 447 .addReg(BinOpRes); in expandAtomicBinOpSubword() 449 .addReg(BinOpRes) in expandAtomicBinOpSubword() 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 492 .addReg(BinOpRes) in expandAtomicBinOpSubword() 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 505 .addReg(BinOpRes); in expandAtomicBinOpSubword() 510 .addReg(BinOpRes) in expandAtomicBinOpSubword() 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 417 Register BinOpRes = I->getOperand(7).getReg(); 447 .addReg(BinOpRes); 449 .addReg(BinOpRes) 491 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) 492 .addReg(BinOpRes) 499 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) 505 .addReg(BinOpRes); 510 .addReg(BinOpRes) 516 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) 520 .addReg(BinOpRes) [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 488 Register BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 518 .addReg(BinOpRes); in expandAtomicBinOpSubword() 520 .addReg(BinOpRes) in expandAtomicBinOpSubword() 562 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 563 .addReg(BinOpRes) in expandAtomicBinOpSubword() 570 BuildMI(loopMBB, DL, TII->get(OR), BinOpRes) in expandAtomicBinOpSubword() 576 .addReg(BinOpRes); in expandAtomicBinOpSubword() 581 .addReg(BinOpRes) in expandAtomicBinOpSubword() 587 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 591 .addReg(BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 384 unsigned BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 409 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() 412 BuildMI(loopMBB, DL, TII->get(Mips::NOR), BinOpRes) in expandAtomicBinOpSubword() 414 .addReg(BinOpRes); in expandAtomicBinOpSubword() 415 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() 416 .addReg(BinOpRes) in expandAtomicBinOpSubword() 421 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 424 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() 425 .addReg(BinOpRes) in expandAtomicBinOpSubword() 429 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 385 unsigned BinOpRes = I->getOperand(7).getReg(); in expandAtomicBinOpSubword() local 410 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() 413 BuildMI(loopMBB, DL, TII->get(Mips::NOR), BinOpRes) in expandAtomicBinOpSubword() 415 .addReg(BinOpRes); in expandAtomicBinOpSubword() 416 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() 417 .addReg(BinOpRes) in expandAtomicBinOpSubword() 422 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) in expandAtomicBinOpSubword() 425 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() 426 .addReg(BinOpRes) in expandAtomicBinOpSubword() 430 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword() [all …]
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Mips/ |
H A D | MipsExpandPseudo.cpp | 385 unsigned BinOpRes = I->getOperand(7).getReg(); 410 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) 413 BuildMI(loopMBB, DL, TII->get(Mips::NOR), BinOpRes) 415 .addReg(BinOpRes); 416 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) 417 .addReg(BinOpRes) 422 BuildMI(loopMBB, DL, TII->get(Opcode), BinOpRes) 425 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) 426 .addReg(BinOpRes) 430 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) [all …]
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