| /dports/audio/liquidsfz/liquidsfz-0.2.3/lib/ |
| H A D | liquidsfz.cc | 133 struct CCInfo::Impl {
134 LiquidSFZInternal::CCInfo cc_info;
137 CCInfo::CCInfo() : impl (new CCInfo::Impl()) in CCInfo() function in CCInfo
141 CCInfo::~CCInfo() in ~CCInfo()
146 CCInfo::cc() const in cc()
152 CCInfo::label() const in label()
161 CCInfo::has_label() const in has_label()
167 CCInfo::default_value() const in default_value()
172 vector<CCInfo>
175 vector<CCInfo> result; in list_ccs()
|
| H A D | liquidsfz.hh | 52 class CCInfo class
59 CCInfo();
60 CCInfo (CCInfo&&) = default;
61 ~CCInfo();
198 std::vector<CCInfo> list_ccs() const;
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 180 CCInfo.AllocateReg(Reg); in allocateSpecialEntryInputVGPRs()
188 CCInfo.AllocateReg(Reg); in allocateSpecialEntryInputVGPRs()
196 CCInfo.AllocateReg(Reg); in allocateSpecialEntryInputVGPRs()
217 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
223 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
234 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
240 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
264 CCInfo.AllocateReg(Reg); in allocateSystemSGPRs()
270 CCInfo.AllocateReg(Reg); in allocateSystemSGPRs()
276 CCInfo.AllocateReg(Reg); in allocateSystemSGPRs()
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 385 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
394 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
400 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
406 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
417 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
423 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
429 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
602 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
679 CCInfo.AllocateReg(AMDGPU::VGPR1); in lowerFormalArguments()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 385 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
394 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
400 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
406 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
417 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
423 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
429 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
602 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
679 CCInfo.AllocateReg(AMDGPU::VGPR1); in lowerFormalArguments()
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 385 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
394 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
400 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
406 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
417 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
423 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
429 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
602 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
679 CCInfo.AllocateReg(AMDGPU::VGPR1); in lowerFormalArguments()
[all …]
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 106 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArguments() local
112 CCInfo.AllocateReg(PrivateSegmentBufferReg); in lowerFormalArguments()
118 CCInfo.AllocateReg(DispatchPtrReg); in lowerFormalArguments()
124 CCInfo.AllocateReg(QueuePtrReg); in lowerFormalArguments()
134 CCInfo.AllocateReg(InputPtrReg); in lowerFormalArguments()
140 CCInfo.AllocateReg(DispatchIDReg); in lowerFormalArguments()
146 CCInfo.AllocateReg(FlatScratchInitReg); in lowerFormalArguments()
218 OrigArg.Flags, CCInfo); in lowerFormalArguments()
226 AssignFn(i, ValVT, ValVT, CCValAssign::Full, OrigArg.Flags, CCInfo); in lowerFormalArguments()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 105 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArguments() local
111 CCInfo.AllocateReg(PrivateSegmentBufferReg); in lowerFormalArguments()
117 CCInfo.AllocateReg(DispatchPtrReg); in lowerFormalArguments()
123 CCInfo.AllocateReg(QueuePtrReg); in lowerFormalArguments()
133 CCInfo.AllocateReg(InputPtrReg); in lowerFormalArguments()
139 CCInfo.AllocateReg(DispatchIDReg); in lowerFormalArguments()
145 CCInfo.AllocateReg(FlatScratchInitReg); in lowerFormalArguments()
217 OrigArg.Flags, CCInfo); in lowerFormalArguments()
225 AssignFn(i, ValVT, ValVT, CCValAssign::Full, OrigArg.Flags, CCInfo); in lowerFormalArguments()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
442 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
451 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
457 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
463 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
474 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
480 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
486 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
605 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
442 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
451 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
457 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
463 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
474 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
480 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
486 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
605 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
442 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
451 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
457 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
463 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
474 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
480 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
486 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
605 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
442 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
451 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
457 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
463 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
474 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
480 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
486 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
605 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
442 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
451 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
457 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
463 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
474 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
480 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
486 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
605 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
442 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
451 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
457 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
463 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
474 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
480 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
486 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
605 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
678 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 325 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() local
333 if (!determineAssignments(Assigner, RetInfos, CCInfo)) in lowerReturn()
375 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() local
387 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerFormalArguments()
396 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in lowerFormalArguments()
401 VaArgOffset = alignTo(CCInfo.getNextStackOffset(), RegSize); in lowerFormalArguments()
495 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall() local
506 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerCall()
513 unsigned NextStackOffset = CCInfo.getNextStackOffset(); in lowerCall()
550 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 325 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() local
333 if (!determineAssignments(Assigner, RetInfos, CCInfo)) in lowerReturn()
375 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() local
387 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerFormalArguments()
396 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in lowerFormalArguments()
401 VaArgOffset = alignTo(CCInfo.getNextStackOffset(), RegSize); in lowerFormalArguments()
495 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall() local
506 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerCall()
513 unsigned NextStackOffset = CCInfo.getNextStackOffset(); in lowerCall()
550 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 325 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() local
333 if (!determineAssignments(Assigner, RetInfos, CCInfo)) in lowerReturn()
375 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() local
387 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerFormalArguments()
396 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in lowerFormalArguments()
401 VaArgOffset = alignTo(CCInfo.getNextStackOffset(), RegSize); in lowerFormalArguments()
495 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall() local
506 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerCall()
513 unsigned NextStackOffset = CCInfo.getNextStackOffset(); in lowerCall()
550 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 338 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() local
346 if (!determineAssignments(Assigner, RetInfos, CCInfo)) in lowerReturn()
388 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() local
400 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerFormalArguments()
409 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in lowerFormalArguments()
414 VaArgOffset = alignTo(CCInfo.getNextStackOffset(), RegSize); in lowerFormalArguments()
508 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall() local
519 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerCall()
526 unsigned NextStackOffset = CCInfo.getNextStackOffset(); in lowerCall()
563 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 325 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() local
333 if (!determineAssignments(Assigner, RetInfos, CCInfo)) in lowerReturn()
375 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() local
387 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerFormalArguments()
396 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in lowerFormalArguments()
401 VaArgOffset = alignTo(CCInfo.getNextStackOffset(), RegSize); in lowerFormalArguments()
495 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall() local
506 if (!determineAssignments(Assigner, ArgInfos, CCInfo)) in lowerCall()
513 unsigned NextStackOffset = CCInfo.getNextStackOffset(); in lowerCall()
550 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 325 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
333 if (!determineAssignments(Assigner, RetInfos, CCInfo))
375 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
387 if (!determineAssignments(Assigner, ArgInfos, CCInfo))
396 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);
401 VaArgOffset = alignTo(CCInfo.getNextStackOffset(), RegSize);
495 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs,
506 if (!determineAssignments(Assigner, ArgInfos, CCInfo))
513 unsigned NextStackOffset = CCInfo.getNextStackOffset();
550 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 428 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
437 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
443 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
449 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
460 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
466 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
472 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
684 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
763 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
764 CCInfo.AllocateReg(AMDGPU::VGPR1); in lowerFormalArguments()
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 432 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
441 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
447 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
453 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
464 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
470 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
476 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
688 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
767 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
768 CCInfo.AllocateReg(AMDGPU::VGPR1); in lowerFormalArguments()
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 224 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() local
226 CCInfo.AnalyzeReturn(Outs, TLI.CCAssignFnForReturn()); in lowerReturn()
277 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() local
283 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(F.getCallingConv()), in lowerFormalArguments()
285 CCInfo.AnalyzeFormalArguments(Ins, TLI.CCAssignFnForCall()); in lowerFormalArguments()
358 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
361 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(CallConv), 1); in lowerCall()
363 CCInfo.AnalyzeCallOperands(Outs, TLI.CCAssignFnForCall(), FuncOrigArgs, Call); in lowerCall()
370 unsigned NextStackOffset = CCInfo.getNextStackOffset(); in lowerCall()
394 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 537 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
546 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
552 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
558 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
569 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
575 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
581 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
603 allocateHSAUserSGPRs(CCInfo, B, MF, *TRI, *Info); in lowerFormalArgumentsKernel()
814 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
893 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 433 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
608 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
617 CCInfo.AllocateReg(PrivateSegmentBufferReg); in allocateHSAUserSGPRs()
623 CCInfo.AllocateReg(DispatchPtrReg); in allocateHSAUserSGPRs()
629 CCInfo.AllocateReg(QueuePtrReg); in allocateHSAUserSGPRs()
640 CCInfo.AllocateReg(InputPtrReg); in allocateHSAUserSGPRs()
646 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()
652 CCInfo.AllocateReg(FlatScratchInitReg); in allocateHSAUserSGPRs()
885 CCInfo.AllocateReg(ImplicitBufferPtrReg); in lowerFormalArguments()
971 CCInfo.AllocateReg(AMDGPU::VGPR0); in lowerFormalArguments()
[all …]
|