/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/ |
H A D | rv740d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rv730d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rs780d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | r600_dpm.c | 318 WREG32_P(CG_SPLL_FUNC_CNTL, SPLL_BYPASS_EN, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 320 WREG32_P(CG_SPLL_FUNC_CNTL, 0, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 328 if (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_CHG_STATUS) in r600_wait_for_spll_change()
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H A D | rs780_dpm.c | 210 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in rs780_preset_starting_fbdiv() 986 u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in rs780_dpm_debugfs_print_current_performance_level()
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H A D | rv740_dpm.c | 290 RREG32(CG_SPLL_FUNC_CNTL); in rv740_read_clock_registers()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | rv740d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rv730d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rs780d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rs780_dpm.c | 212 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in rs780_preset_starting_fbdiv() 987 u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in rs780_dpm_debugfs_print_current_performance_level() 1009 u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in rs780_dpm_get_current_sclk()
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H A D | r600_dpm.c | 322 WREG32_P(CG_SPLL_FUNC_CNTL, SPLL_BYPASS_EN, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 324 WREG32_P(CG_SPLL_FUNC_CNTL, 0, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 332 if (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_CHG_STATUS) in r600_wait_for_spll_change()
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H A D | rv740_dpm.c | 288 RREG32(CG_SPLL_FUNC_CNTL); in rv740_read_clock_registers()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | rv740d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rv730d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rs780d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rs780_dpm.c | 212 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in rs780_preset_starting_fbdiv() 987 u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in rs780_dpm_debugfs_print_current_performance_level() 1009 u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in rs780_dpm_get_current_sclk()
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H A D | r600_dpm.c | 322 WREG32_P(CG_SPLL_FUNC_CNTL, SPLL_BYPASS_EN, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 324 WREG32_P(CG_SPLL_FUNC_CNTL, 0, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 332 if (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_CHG_STATUS) in r600_wait_for_spll_change()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | rv740d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rv730d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rs780d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 macro
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H A D | rs780_dpm.c | 212 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in rs780_preset_starting_fbdiv() 987 u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in rs780_dpm_debugfs_print_current_performance_level() 1009 u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in rs780_dpm_get_current_sclk()
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H A D | r600_dpm.c | 322 WREG32_P(CG_SPLL_FUNC_CNTL, SPLL_BYPASS_EN, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 324 WREG32_P(CG_SPLL_FUNC_CNTL, 0, ~SPLL_BYPASS_EN); in r600_enable_spll_bypass() 332 if (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_CHG_STATUS) in r600_wait_for_spll_change()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | si.c | 1334 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_set_clk_bypass_mode() 1336 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_set_clk_bypass_mode() 1365 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_spll_powerdown() 1367 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_spll_powerdown() 1369 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_spll_powerdown() 1371 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_spll_powerdown()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | si.c | 1334 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_set_clk_bypass_mode() 1336 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_set_clk_bypass_mode() 1365 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_spll_powerdown() 1367 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_spll_powerdown() 1369 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_spll_powerdown() 1371 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_spll_powerdown()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | si.c | 1334 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_set_clk_bypass_mode() 1336 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_set_clk_bypass_mode() 1365 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_spll_powerdown() 1367 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_spll_powerdown() 1369 tmp = RREG32(CG_SPLL_FUNC_CNTL); in si_spll_powerdown() 1371 WREG32(CG_SPLL_FUNC_CNTL, tmp); in si_spll_powerdown()
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