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Searched refs:CONFIG_RAMBOOT_TEXT_BASE (Results 1 – 25 of 307) sorted by relevance

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/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-chip/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
/dports/sysutils/u-boot-pine64/u-boot-2021.07/include/configs/
H A Dcorenet_ds.h19 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
26 #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE macro
89 #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
91 #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)

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