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Searched refs:CONFIG_SYS_MPC85xx_PCIE3_OFFSET (Results 1 – 25 of 63) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h2828 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2833 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2882 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2884 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3039 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h2828 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2833 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2882 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2884 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3039 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h2828 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2833 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2882 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2884 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3039 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h2828 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2833 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2882 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2884 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3039 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/powerpc/include/asm/
H A Dimmap_85xx.h2809 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 macro
2814 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 macro
2863 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 macro
2865 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 macro
3020 (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)

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