/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1719 OffsetVal = COffsetVal; in SelectFlatOffset() 1732 uint64_t RemainderOffset = COffsetVal; in SelectFlatOffset() 1739 ImmField = COffsetVal - RemainderOffset; in SelectFlatOffset() 1742 RemainderOffset = COffsetVal - ImmField; in SelectFlatOffset() 1833 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1876 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1900 int64_t RemainderOffset = COffsetVal; in SelectScratchSAddr() 1905 RemainderOffset = (COffsetVal / D) * D; in SelectScratchSAddr() 1906 ImmField = COffsetVal - RemainderOffset; in SelectScratchSAddr() 1909 assert(RemainderOffset + ImmField == COffsetVal); in SelectScratchSAddr() [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1496 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffsetImpl() local 1499 if (TII->isLegalFLATOffset(COffsetVal, AS, FlatVariant)) { in SelectFlatOffsetImpl() 1501 OffsetVal = COffsetVal; in SelectFlatOffsetImpl() 1517 TII->splitFlatOffset(COffsetVal, AS, FlatVariant); in SelectFlatOffsetImpl() 1615 int64_t COffsetVal = cast<ConstantSDNode>(RHS)->getSExtValue(); in SelectGlobalSAddr() local 1621 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1623 if (COffsetVal > 0) { in SelectGlobalSAddr() 1650 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr() 1725 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1744 COffsetVal = SplitImmOffset; in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7649 SIInstrInfo::splitFlatOffset(int64_t COffsetVal, unsigned AddrSpace, in splitFlatOffset() argument 7651 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7662 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7663 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7672 } else if (COffsetVal >= 0) { in splitFlatOffset() 7673 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7674 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7678 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1705 if (TII->isLegalFLATOffset(COffsetVal, AS, IsSigned)) { in SelectFlatOffset() 1707 OffsetVal = COffsetVal; in SelectFlatOffset() 1723 = TII->splitFlatOffset(COffsetVal, AS, IsSigned); in SelectFlatOffset() 1807 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1808 } else if (!LHS->isDivergent() && COffsetVal > 0) { in SelectGlobalSAddr() 1880 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1904 int64_t RemainderOffset = COffsetVal; in SelectScratchSAddr() 1909 RemainderOffset = (COffsetVal / D) * D; in SelectScratchSAddr() 1910 ImmField = COffsetVal - RemainderOffset; in SelectScratchSAddr() 1913 assert(RemainderOffset + ImmField == COffsetVal); in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7042 std::pair<int64_t, int64_t> SIInstrInfo::splitFlatOffset(int64_t COffsetVal, in splitFlatOffset() argument 7045 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7051 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7052 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7053 } else if (COffsetVal >= 0) { in splitFlatOffset() 7054 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7055 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7059 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1705 if (TII->isLegalFLATOffset(COffsetVal, AS, IsSigned)) { in SelectFlatOffset() 1707 OffsetVal = COffsetVal; in SelectFlatOffset() 1723 = TII->splitFlatOffset(COffsetVal, AS, IsSigned); in SelectFlatOffset() 1807 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1808 } else if (!LHS->isDivergent() && COffsetVal > 0) { in SelectGlobalSAddr() 1880 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1904 int64_t RemainderOffset = COffsetVal; in SelectScratchSAddr() 1909 RemainderOffset = (COffsetVal / D) * D; in SelectScratchSAddr() 1910 ImmField = COffsetVal - RemainderOffset; in SelectScratchSAddr() 1913 assert(RemainderOffset + ImmField == COffsetVal); in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7042 std::pair<int64_t, int64_t> SIInstrInfo::splitFlatOffset(int64_t COffsetVal, in splitFlatOffset() argument 7045 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7051 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7052 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7053 } else if (COffsetVal >= 0) { in splitFlatOffset() 7054 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7055 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7059 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1751 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffsetImpl() local 1754 if (TII->isLegalFLATOffset(COffsetVal, AS, FlatVariant)) { in SelectFlatOffsetImpl() 1756 OffsetVal = COffsetVal; in SelectFlatOffsetImpl() 1772 TII->splitFlatOffset(COffsetVal, AS, FlatVariant); in SelectFlatOffsetImpl() 1870 int64_t COffsetVal = cast<ConstantSDNode>(RHS)->getSExtValue(); in SelectGlobalSAddr() local 1876 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1878 if (COffsetVal > 0) { in SelectGlobalSAddr() 1905 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr() 1980 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1999 COffsetVal = SplitImmOffset; in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7506 SIInstrInfo::splitFlatOffset(int64_t COffsetVal, unsigned AddrSpace, in splitFlatOffset() argument 7508 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7519 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7520 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7529 } else if (COffsetVal >= 0) { in splitFlatOffset() 7530 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7531 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7535 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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H A D | SIInstrInfo.h | 1084 std::pair<int64_t, int64_t> splitFlatOffset(int64_t COffsetVal,
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1751 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffsetImpl() local 1754 if (TII->isLegalFLATOffset(COffsetVal, AS, FlatVariant)) { in SelectFlatOffsetImpl() 1756 OffsetVal = COffsetVal; in SelectFlatOffsetImpl() 1772 TII->splitFlatOffset(COffsetVal, AS, FlatVariant); in SelectFlatOffsetImpl() 1870 int64_t COffsetVal = cast<ConstantSDNode>(RHS)->getSExtValue(); in SelectGlobalSAddr() local 1876 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1878 if (COffsetVal > 0) { in SelectGlobalSAddr() 1905 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr() 1980 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1999 COffsetVal = SplitImmOffset; in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7506 SIInstrInfo::splitFlatOffset(int64_t COffsetVal, unsigned AddrSpace, in splitFlatOffset() argument 7508 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7519 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7520 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7529 } else if (COffsetVal >= 0) { in splitFlatOffset() 7530 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7531 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7535 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1751 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffsetImpl() local 1754 if (TII->isLegalFLATOffset(COffsetVal, AS, FlatVariant)) { in SelectFlatOffsetImpl() 1756 OffsetVal = COffsetVal; in SelectFlatOffsetImpl() 1772 TII->splitFlatOffset(COffsetVal, AS, FlatVariant); in SelectFlatOffsetImpl() 1870 int64_t COffsetVal = cast<ConstantSDNode>(RHS)->getSExtValue(); in SelectGlobalSAddr() local 1876 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1878 if (COffsetVal > 0) { in SelectGlobalSAddr() 1905 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr() 1980 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1999 COffsetVal = SplitImmOffset; in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7506 SIInstrInfo::splitFlatOffset(int64_t COffsetVal, unsigned AddrSpace, in splitFlatOffset() argument 7508 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7519 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7520 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7529 } else if (COffsetVal >= 0) { in splitFlatOffset() 7530 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7531 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7535 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1751 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffsetImpl() local 1754 if (TII->isLegalFLATOffset(COffsetVal, AS, FlatVariant)) { in SelectFlatOffsetImpl() 1756 OffsetVal = COffsetVal; in SelectFlatOffsetImpl() 1772 TII->splitFlatOffset(COffsetVal, AS, FlatVariant); in SelectFlatOffsetImpl() 1870 int64_t COffsetVal = cast<ConstantSDNode>(RHS)->getSExtValue(); in SelectGlobalSAddr() local 1876 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1878 if (COffsetVal > 0) { in SelectGlobalSAddr() 1905 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr() 1980 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1999 COffsetVal = SplitImmOffset; in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7506 SIInstrInfo::splitFlatOffset(int64_t COffsetVal, unsigned AddrSpace, in splitFlatOffset() argument 7508 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7519 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7520 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7529 } else if (COffsetVal >= 0) { in splitFlatOffset() 7530 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7531 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7535 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1751 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffsetImpl() local 1754 if (TII->isLegalFLATOffset(COffsetVal, AS, FlatVariant)) { in SelectFlatOffsetImpl() 1756 OffsetVal = COffsetVal; in SelectFlatOffsetImpl() 1772 TII->splitFlatOffset(COffsetVal, AS, FlatVariant); in SelectFlatOffsetImpl() 1870 int64_t COffsetVal = cast<ConstantSDNode>(RHS)->getSExtValue(); in SelectGlobalSAddr() local 1876 ImmOffset = COffsetVal; in SelectGlobalSAddr() 1878 if (COffsetVal > 0) { in SelectGlobalSAddr() 1905 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr() 1980 int64_t COffsetVal = 0; in SelectScratchSAddr() local 1999 COffsetVal = SplitImmOffset; in SelectScratchSAddr() [all …]
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H A D | SIInstrInfo.cpp | 7506 SIInstrInfo::splitFlatOffset(int64_t COffsetVal, unsigned AddrSpace, in splitFlatOffset() argument 7508 int64_t RemainderOffset = COffsetVal; in splitFlatOffset() 7519 RemainderOffset = (COffsetVal / D) * D; in splitFlatOffset() 7520 ImmField = COffsetVal - RemainderOffset; in splitFlatOffset() 7529 } else if (COffsetVal >= 0) { in splitFlatOffset() 7530 ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits); in splitFlatOffset() 7531 RemainderOffset = COffsetVal - ImmField; in splitFlatOffset() 7535 assert(RemainderOffset + ImmField == COffsetVal); in splitFlatOffset()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1681 uint64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffset() local 1685 if (TII->isLegalFLATOffset(COffsetVal, AS, IsSigned)) { in SelectFlatOffset() 1687 OffsetVal = COffsetVal; in SelectFlatOffset() 1696 ImmField = SignExtend64(COffsetVal, NumBits); in SelectFlatOffset() 1703 if (static_cast<int64_t>(COffsetVal) > 0) { in SelectFlatOffset() 1707 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1713 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1716 uint64_t RemainderOffset = COffsetVal - ImmField; in SelectFlatOffset() 1719 assert(RemainderOffset + ImmField == COffsetVal); in SelectFlatOffset()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1663 uint64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffset() local 1667 if (TII->isLegalFLATOffset(COffsetVal, AS, IsSigned)) { in SelectFlatOffset() 1669 OffsetVal = COffsetVal; in SelectFlatOffset() 1678 ImmField = SignExtend64(COffsetVal, NumBits); in SelectFlatOffset() 1685 if (static_cast<int64_t>(COffsetVal) > 0) { in SelectFlatOffset() 1688 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1694 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1697 uint64_t RemainderOffset = COffsetVal - ImmField; in SelectFlatOffset() 1700 assert(RemainderOffset + ImmField == COffsetVal); in SelectFlatOffset()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1681 uint64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffset() local 1685 if (TII->isLegalFLATOffset(COffsetVal, AS, IsSigned)) { in SelectFlatOffset() 1687 OffsetVal = COffsetVal; in SelectFlatOffset() 1696 ImmField = SignExtend64(COffsetVal, NumBits); in SelectFlatOffset() 1703 if (static_cast<int64_t>(COffsetVal) > 0) { in SelectFlatOffset() 1707 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1713 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1716 uint64_t RemainderOffset = COffsetVal - ImmField; in SelectFlatOffset() 1719 assert(RemainderOffset + ImmField == COffsetVal); in SelectFlatOffset()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1663 uint64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffset() local 1667 if (TII->isLegalFLATOffset(COffsetVal, AS, IsSigned)) { in SelectFlatOffset() 1669 OffsetVal = COffsetVal; in SelectFlatOffset() 1678 ImmField = SignExtend64(COffsetVal, NumBits); in SelectFlatOffset() 1685 if (static_cast<int64_t>(COffsetVal) > 0) { in SelectFlatOffset() 1688 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1694 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1697 uint64_t RemainderOffset = COffsetVal - ImmField; in SelectFlatOffset() 1700 assert(RemainderOffset + ImmField == COffsetVal); in SelectFlatOffset()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1663 uint64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffset() local 1667 if (TII->isLegalFLATOffset(COffsetVal, AS, IsSigned)) { in SelectFlatOffset() 1669 OffsetVal = COffsetVal; in SelectFlatOffset() 1678 ImmField = SignExtend64(COffsetVal, NumBits); in SelectFlatOffset() 1685 if (static_cast<int64_t>(COffsetVal) > 0) { in SelectFlatOffset() 1688 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1694 ImmField = COffsetVal & OffsetMask; in SelectFlatOffset() 1697 uint64_t RemainderOffset = COffsetVal - ImmField; in SelectFlatOffset() 1700 assert(RemainderOffset + ImmField == COffsetVal); in SelectFlatOffset()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1290 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffset() local 1292 if ((IsSigned && isInt<13>(COffsetVal)) || in SelectFlatOffset() 1293 (!IsSigned && isUInt<12>(COffsetVal))) { in SelectFlatOffset() 1295 OffsetVal = COffsetVal; in SelectFlatOffset()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1361 int64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue(); in SelectFlatOffset() local 1363 if ((IsSigned && isInt<13>(COffsetVal)) || in SelectFlatOffset() 1364 (!IsSigned && isUInt<12>(COffsetVal))) { in SelectFlatOffset() 1366 OffsetVal = COffsetVal; in SelectFlatOffset()
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