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Searched refs:CP0C1_FP (Results 1 – 25 of 58) sorted by relevance

123

/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate_init.c34 (0 << CP0C1_FP))
324 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
356 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
404 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
438 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
477 (1 << CP0C1_FP) | (47 << CP0C1_MMU),
505 (1 << CP0C1_FP) | (47 << CP0C1_MMU),
563 MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
598 MIPS_CONFIG1 | (1 << CP0C1_FP) | (47 << CP0C1_MMU) |
715 (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate_init.c34 (0 << CP0C1_FP))
324 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
356 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
404 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
438 MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
477 (1 << CP0C1_FP) | (47 << CP0C1_MMU),
505 (1 << CP0C1_FP) | (47 << CP0C1_MMU),
563 MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
598 MIPS_CONFIG1 | (1 << CP0C1_FP) | (47 << CP0C1_MMU) |
715 (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/
H A Dtranslate_init.inc.c34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
524 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU) | 0x40,
526 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
563 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
669 (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
889 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c36 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
84 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()
H A Dkvm.c73 if (kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_arch_init_vcpu()
104 if (!kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_reset_vcpu()
106 env->CP0_Config1 &= ~(1 << CP0C1_FP); in kvm_mips_reset_vcpu()
388 (1U << CP0C1_FP))
566 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_put_fpu_registers()
646 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_get_fpu_registers()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/
H A Dtranslate_init.inc.c34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
421 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
499 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
519 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
560 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
772 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c33 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
90 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()
H A Dkvm.c73 if (kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_arch_init_vcpu()
104 if (!kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_reset_vcpu()
106 env->CP0_Config1 &= ~(1 << CP0C1_FP); in kvm_mips_reset_vcpu()
388 (1U << CP0C1_FP))
566 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_put_fpu_registers()
646 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_get_fpu_registers()
/dports/emulators/qemu42/qemu-4.2.1/target/mips/
H A Dtranslate_init.inc.c34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
421 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
499 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
519 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
560 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
772 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c33 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
90 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()
H A Dkvm.c73 if (kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_arch_init_vcpu()
104 if (!kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_reset_vcpu()
106 env->CP0_Config1 &= ~(1 << CP0C1_FP); in kvm_mips_reset_vcpu()
388 (1U << CP0C1_FP))
566 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_put_fpu_registers()
646 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_get_fpu_registers()
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/
H A Dtranslate_init.inc.c34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
421 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
499 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
519 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
560 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
772 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c33 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
90 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()
H A Dkvm.c73 if (kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_arch_init_vcpu()
104 if (!kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_reset_vcpu()
106 env->CP0_Config1 &= ~(1 << CP0C1_FP); in kvm_mips_reset_vcpu()
388 (1U << CP0C1_FP))
566 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_put_fpu_registers()
646 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_get_fpu_registers()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/
H A Dtranslate_init.inc.c34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
421 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
498 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
518 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
559 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
731 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c34 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
91 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()
H A Dkvm.c72 if (kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_arch_init_vcpu()
98 if (!kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_reset_vcpu()
100 env->CP0_Config1 &= ~(1 << CP0C1_FP); in kvm_mips_reset_vcpu()
382 (1U << CP0C1_FP))
560 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_put_fpu_registers()
640 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_get_fpu_registers()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/
H A Dcpu-defs.c.inc34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
422 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
501 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
522 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
563 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
775 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c34 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) {
91 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) {
/dports/emulators/qemu/qemu-6.2.0/target/mips/
H A Dcpu-defs.c.inc34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
380 (1 << CP0C1_PC) | (1 << CP0C1_FP),
421 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
500 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
521 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
562 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
774 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c34 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
91 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()
/dports/emulators/qemu60/qemu-6.0.0/target/mips/
H A Dcpu-defs.c.inc34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
422 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
501 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
522 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
563 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
775 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c34 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
91 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()
/dports/emulators/qemu5/qemu-5.2.0/target/mips/
H A Dtranslate_init.c.inc34 (0 << CP0C1_FP))
231 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
257 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) |
305 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
381 (1 << CP0C1_PC) | (1 << CP0C1_FP),
422 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
500 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
520 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
561 .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
773 .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
[all …]
H A Dgdbstub.c33 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_read_register()
90 if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) { in mips_cpu_gdb_write_register()

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