Searched refs:CP0C3_DSP2P (Results 1 – 22 of 22) sorted by relevance
409 MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |778 MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
439 #define CP0C3_DSP2P 11
439 #define CP0C3_DSP2P 11 macro
310 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |466 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |816 .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
888 #define CP0C3_DSP2P 11 macro
310 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |466 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |775 .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
447 #define CP0C3_DSP2P 11 macro
310 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |466 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |933 .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
989 #define CP0C3_DSP2P 11 macro
310 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |467 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |907 .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
903 #define CP0C3_DSP2P 11
310 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |466 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |907 .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
903 #define CP0C3_DSP2P 11 macro
310 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |467 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |903 .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
890 #define CP0C3_DSP2P 11 macro