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Searched refs:CP0MVPC0_M (Results 1 – 22 of 22) sorted by relevance

/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate_init.c898 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()
H A Dcpu.h144 #define CP0MVPC0_M 31
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate_init.c898 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()
H A Dcpu.h144 #define CP0MVPC0_M 31 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/
H A Dcpu.h101 #define CP0MVPC0_M 31 macro
H A Dtranslate_init.inc.c875 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/
H A Dcpu.h109 #define CP0MVPC0_M 31 macro
H A Dtranslate_init.inc.c913 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()
/dports/emulators/qemu5/qemu-5.2.0/target/mips/
H A Dcpu.h110 #define CP0MVPC0_M 31 macro
H A Dtranslate_init.c.inc1000 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) |
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/
H A Dcpu.h109 #define CP0MVPC0_M 31 macro
H A Dtranslate_init.inc.c913 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()
/dports/emulators/qemu42/qemu-4.2.1/target/mips/
H A Dcpu.h109 #define CP0MVPC0_M 31 macro
H A Dtranslate_init.inc.c913 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/
H A Dcpu.h110 #define CP0MVPC0_M 31
H A Dcpu-defs.c.inc960 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) |
/dports/emulators/qemu/qemu-6.2.0/target/mips/
H A Dcpu.h110 #define CP0MVPC0_M 31 macro
H A Dcpu-defs.c.inc960 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) |
/dports/emulators/qemu60/qemu-6.0.0/target/mips/
H A Dcpu.h110 #define CP0MVPC0_M 31 macro
H A Dcpu-defs.c.inc960 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) |
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/
H A Dcpu.h114 #define CP0MVPC0_M 31 macro
H A Dtranslate_init.inc.c1030 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()