Searched refs:CP0SRSC0_SRS1 (Results 1 – 22 of 22) sorted by relevance
| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | translate_init.c | 382 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| H A D | cpu.h | 299 #define CP0SRSC0_SRS1 0
|
| /dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | translate_init.c | 382 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| H A D | cpu.h | 299 #define CP0SRSC0_SRS1 0 macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/ |
| H A D | cpu.h | 298 #define CP0SRSC0_SRS1 0 macro
|
| H A D | translate_init.inc.c | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/mips/ |
| H A D | cpu.h | 703 #define CP0SRSC0_SRS1 0 macro
|
| H A D | translate_init.inc.c | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu5/qemu-5.2.0/target/mips/ |
| H A D | cpu.h | 705 #define CP0SRSC0_SRS1 0 macro
|
| H A D | translate_init.c.inc | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/ |
| H A D | cpu.h | 703 #define CP0SRSC0_SRS1 0 macro
|
| H A D | translate_init.inc.c | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu42/qemu-4.2.1/target/mips/ |
| H A D | cpu.h | 703 #define CP0SRSC0_SRS1 0 macro
|
| H A D | translate_init.inc.c | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/ |
| H A D | cpu.h | 709 #define CP0SRSC0_SRS1 0
|
| H A D | cpu-defs.c.inc | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu/qemu-6.2.0/target/mips/ |
| H A D | cpu.h | 709 #define CP0SRSC0_SRS1 0 macro
|
| H A D | cpu-defs.c.inc | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu60/qemu-6.0.0/target/mips/ |
| H A D | cpu.h | 709 #define CP0SRSC0_SRS1 0 macro
|
| H A D | cpu-defs.c.inc | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/ |
| H A D | cpu.h | 796 #define CP0SRSC0_SRS1 0 macro
|
| H A D | translate_init.inc.c | 282 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1),
|