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Searched refs:CPU_CONTROL_IDC_ENABLE (Results 1 – 6 of 6) sorted by relevance

/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/arm/arm/
H A Dcpufunc.c2605 { "nocache", IGN, BIC, CPU_CONTROL_IDC_ENABLE },
2608 { "cpu.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
2609 { "cpu.nocache", OR, BIC, CPU_CONTROL_IDC_ENABLE },
2619 { "arm6.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
2620 { "arm6.nocache", OR, BIC, CPU_CONTROL_IDC_ENABLE },
2637 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE in arm6_setup()
2668 { "arm7.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
2689 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE in arm7_setup()
2717 { "arm7.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
2755 { "arm8.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
[all …]
/dports/devel/android-tools-fastboot/platform_system_core-platform-tools-29.0.5/libpixelflinger/codeflinger/
H A Darmreg.h228 #define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE macro
/dports/devel/android-tools-adb/platform_system_core-android-9.0.0_r3/libpixelflinger/codeflinger/
H A Darmreg.h228 #define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE macro
/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/arm/arm32/
H A Dcpu.c684 if ((ci->ci_ctrl & CPU_CONTROL_IDC_ENABLE) == 0) in identify_arm_cpu()
/dports/emulators/gxemul/gxemul-0.6.3/src/include/thirdparty/
H A Darmreg.h217 #define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE macro
/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/arm/include/
H A Darmreg.h389 #define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE macro