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Searched refs:CPU_CONTROL_ROM_ENABLE (Results 1 – 5 of 5) sorted by relevance

/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/arm/arm/
H A Dcpufunc.c2638 | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BEND_ENABLE in arm6_setup()
2691 | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BEND_ENABLE in arm7_setup()
2781 | CPU_CONTROL_BPRD_ENABLE | CPU_CONTROL_ROM_ENABLE in arm8_setup()
2864 | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE in arm9_setup()
2917 | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE in arm10_setup()
2976 | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BPRD_ENABLE in arm11_setup()
3316 | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE in sa110_setup()
3384 | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE in sa11x0_setup()
3439 | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE in fa526_setup()
3493 | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_IC_ENABLE in ixp12x0_setup()
[all …]
/dports/devel/android-tools-fastboot/platform_system_core-platform-tools-29.0.5/libpixelflinger/codeflinger/
H A Darmreg.h220 #define CPU_CONTROL_ROM_ENABLE 0x00000200 /* R: ROM protection bit */ macro
/dports/devel/android-tools-adb/platform_system_core-android-9.0.0_r3/libpixelflinger/codeflinger/
H A Darmreg.h220 #define CPU_CONTROL_ROM_ENABLE 0x00000200 /* R: ROM protection bit */ macro
/dports/emulators/gxemul/gxemul-0.6.3/src/include/thirdparty/
H A Darmreg.h196 #define CPU_CONTROL_ROM_ENABLE 0x00000200 /* R: ROM protection bit */ macro
/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/arm/include/
H A Darmreg.h368 #define CPU_CONTROL_ROM_ENABLE 0x00000200 /* R: ROM protection bit */ macro