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Searched refs:CPU_ISSUN4M (Results 1 – 11 of 11) sorted by relevance

/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/sparc/sparc/
H A Dauxreg.h75 if (CPU_ISSUN4M) { \
85 if (CPU_ISSUN4M) { \
95 if (CPU_ISSUN4M) { \
105 if (CPU_ISSUN4M) { \
121 CPU_ISSUN4M \
H A Dintr.c157 if (!CPU_ISSUN4M || sparc_ncpus <= 1) in getitr()
177 if (!CPU_ISSUN4M || sparc_ncpus <= 1) in setitr()
544 displ = (CPU_ISSUN4M || CPU_ISSUN4D) in check_tv()
610 displ = (CPU_ISSUN4M || CPU_ISSUN4D) in uninst_fasttrap()
818 if (CPU_ISSUN4M || CPU_ISSUN4D) {
H A Dautoconf.c192 if (!CPU_ISSUN4M && !CPU_ISSUN4D) in find_cpus()
331 if (CPU_ISSUN4M) { in bootstrap()
548 if (CPU_ISSUN4M && bp == bootpath in bootpath_build()
649 if (CPU_ISSUN4M) { in bootpath_fake()
980 if (CPU_ISSUN4M) in cpu_configure()
983 if (CPU_ISSUN4M) in cpu_configure()
1238 else if (CPU_ISSUN4M) in mainbus_attach()
1246 if (CPU_ISSUN4M) { in mainbus_attach()
1336 if (CPU_ISSUN4M) { /* skip the CPUs */ in mainbus_attach()
1370 if (CPU_ISSUN4M && strcmp(ma.ma_name, "sbus") == 0) { in mainbus_attach()
[all …]
H A Dtimer.c210 if (CPU_ISSUN4M) { in timerattach()
H A Dmachdep.c847 if (CPU_ISSUN4M) in cpu_reboot()
1161 if (CPU_ISSUN4M || CPU_ISSUN4D) { in ldcontrolb()
H A Dcpu.c1329 if (node == 0 && CPU_ISSUN4M && bootmid != 0) { in getcacheinfo_obp()
H A Dpmap.c7418 if (CPU_ISSUN4M) /* %%%: Implement! */
/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/sparc/include/
H A Dcpuconf.h113 # define CPU_ISSUN4M (0) macro
115 # define CPU_ISSUN4M (1) macro
117 # define CPU_ISSUN4M (cputyp == CPU_SUN4M) macro
133 #define CPU_HAS_SRMMU (CPU_ISSUN4M || CPU_ISSUN4D)
H A Dintr.h88 if (CPU_ISSUN4M || CPU_ISSUN4D) \
/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/sbus/
H A Dif_en.c85 if (CPU_ISSUN4M) { in en_sbus_match()
/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/sparc64/include/
H A Dparam.h281 #define CPU_ISSUN4M (0) macro