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/dports/sysutils/virt-what/virt-what-1.21/tests/zvm/proc/
H A Dsysinfo10 CPUs Total: 34
11 CPUs Configured: 18
12 CPUs Standby: 0
13 CPUs Reserved: 16
54 LPAR CPUs Total: 8
55 LPAR CPUs Configured: 4
56 LPAR CPUs Standby: 4
57 LPAR CPUs Reserved: 0
58 LPAR CPUs Dedicated: 0
59 LPAR CPUs Shared: 4
[all …]
/dports/devel/libvirt/libvirt-7.10.0/tests/sysinfodata/
H A Ds390sysinfo.data21 CPUs Total: 69
22 CPUs Configured: 3
23 CPUs Standby: 0
24 CPUs Reserved: 66
103 LPAR CPUs Standby: 0
104 LPAR CPUs Reserved: 0
105 LPAR CPUs Dedicated: 0
111 VM00 CPUs Total: 3
112 VM00 CPUs Configured: 3
113 VM00 CPUs Standby: 0
[all …]
H A Ds390-freqsysinfo.data23 CPUs Total: 129
24 CPUs Configured: 4
25 CPUs Standby: 0
26 CPUs Reserved: 125
27 CPUs G-MTID: 0
28 CPUs S-MTID: 1
165 LPAR CPUs Total: 4
166 LPAR CPUs Configured: 4
167 LPAR CPUs Standby: 0
168 LPAR CPUs Reserved: 0
[all …]
/dports/net-mgmt/p5-FusionInventory-Agent/FusionInventory-Agent-2.5.2/resources/aix/lparstat/
H A Dsample49 Online Virtual CPUs : 4
10 Maximum Virtual CPUs : 4
11 Minimum Virtual CPUs : 2
19 Maximum Physical CPUs in system : 16
20 Active Physical CPUs in system : 16
21 Active CPUs in Pool : 16
22 Shared Physical CPUs in system : 16
28 Desired Virtual CPUs : 4
H A Dsample29 Online Virtual CPUs : 1
10 Maximum Virtual CPUs : 1
11 Minimum Virtual CPUs : 1
19 Maximum Physical CPUs in system : 64
20 Active Physical CPUs in system : 64
21 Active CPUs in Pool : 2
22 Shared Physical CPUs in system : 64
37 Desired Virtual CPUs : 1
H A Dsample69 Online Virtual CPUs : 3
10 Maximum Virtual CPUs : 8
11 Minimum Virtual CPUs : 1
19 Maximum Physical CPUs in system : 8
20 Active Physical CPUs in system : 4
21 Active CPUs in Pool : 4
H A Dsample59 Online Virtual CPUs : 1
10 Maximum Virtual CPUs : 8
11 Minimum Virtual CPUs : 1
19 Maximum Physical CPUs in system : 16
20 Active Physical CPUs in system : 16
21 Active CPUs in Pool : 16
H A Dsample19 Online Virtual CPUs : 4
10 Maximum Virtual CPUs : 4
11 Minimum Virtual CPUs : 0
19 Maximum Physical CPUs in system : 4
20 Active Physical CPUs in system : 4
21 Active CPUs in Pool : -
H A Dsample39 Online Virtual CPUs : 1
10 Maximum Virtual CPUs : 4
11 Minimum Virtual CPUs : 1
19 Maximum Physical CPUs in system : 4
20 Active Physical CPUs in system : 4
21 Active CPUs in Pool : -
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/docs/perf/
H A Dpsci-performance-juno.rst50 then initiates the test on all CPUs in parallel.
57 In the results below, CPUs 0-3 refer to CPUs in the little cluster (A53) and
58 CPUs 4-5 refer to CPUs in the big cluster (A57). In all cases CPU 4 is the lead
85 ``CPU_SUSPEND`` to deepest power level on all CPUs in parallel
117 ``CPU_SUSPEND`` to power level 0 on all CPUs in parallel
141 effectively serializes the SCP power down commands from all CPUs.
152 ``CPU_SUSPEND`` to deepest power level on all CPUs in sequence
184 ``CPU_SUSPEND`` to power level 0 on all CPUs in sequence
208 for the CPUs in little cluster due to greater CPU performance.
259 ``PSCI_VERSION`` on all CPUs in parallel
[all …]
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/docs/perf/
H A Dpsci-performance-juno.rst50 then initiates the test on all CPUs in parallel.
57 In the results below, CPUs 0-3 refer to CPUs in the little cluster (A53) and
58 CPUs 4-5 refer to CPUs in the big cluster (A57). In all cases CPU 4 is the lead
85 ``CPU_SUSPEND`` to deepest power level on all CPUs in parallel
117 ``CPU_SUSPEND`` to power level 0 on all CPUs in parallel
141 effectively serializes the SCP power down commands from all CPUs.
152 ``CPU_SUSPEND`` to deepest power level on all CPUs in sequence
184 ``CPU_SUSPEND`` to power level 0 on all CPUs in sequence
208 for the CPUs in little cluster due to greater CPU performance.
259 ``PSCI_VERSION`` on all CPUs in parallel
[all …]
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/docs/perf/
H A Dpsci-performance-juno.rst50 then initiates the test on all CPUs in parallel.
57 In the results below, CPUs 0-3 refer to CPUs in the little cluster (A53) and
58 CPUs 4-5 refer to CPUs in the big cluster (A57). In all cases CPU 4 is the lead
85 ``CPU_SUSPEND`` to deepest power level on all CPUs in parallel
117 ``CPU_SUSPEND`` to power level 0 on all CPUs in parallel
141 effectively serializes the SCP power down commands from all CPUs.
152 ``CPU_SUSPEND`` to deepest power level on all CPUs in sequence
184 ``CPU_SUSPEND`` to power level 0 on all CPUs in sequence
208 for the CPUs in little cluster due to greater CPU performance.
259 ``PSCI_VERSION`` on all CPUs in parallel
[all …]
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/docs/perf/
H A Dpsci-performance-juno.rst50 then initiates the test on all CPUs in parallel.
57 In the results below, CPUs 0-3 refer to CPUs in the little cluster (A53) and
58 CPUs 4-5 refer to CPUs in the big cluster (A57). In all cases CPU 4 is the lead
85 ``CPU_SUSPEND`` to deepest power level on all CPUs in parallel
117 ``CPU_SUSPEND`` to power level 0 on all CPUs in parallel
141 effectively serializes the SCP power down commands from all CPUs.
152 ``CPU_SUSPEND`` to deepest power level on all CPUs in sequence
184 ``CPU_SUSPEND`` to power level 0 on all CPUs in sequence
208 for the CPUs in little cluster due to greater CPU performance.
259 ``PSCI_VERSION`` on all CPUs in parallel
[all …]
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/docs/perf/
H A Dpsci-performance-juno.rst50 then initiates the test on all CPUs in parallel.
57 In the results below, CPUs 0-3 refer to CPUs in the little cluster (A53) and
58 CPUs 4-5 refer to CPUs in the big cluster (A57). In all cases CPU 4 is the lead
85 ``CPU_SUSPEND`` to deepest power level on all CPUs in parallel
117 ``CPU_SUSPEND`` to power level 0 on all CPUs in parallel
141 effectively serializes the SCP power down commands from all CPUs.
152 ``CPU_SUSPEND`` to deepest power level on all CPUs in sequence
184 ``CPU_SUSPEND`` to power level 0 on all CPUs in sequence
208 for the CPUs in little cluster due to greater CPU performance.
259 ``PSCI_VERSION`` on all CPUs in parallel
[all …]
/dports/sysutils/kubectl/kubernetes-1.22.2/pkg/kubelet/cm/cpumanager/
H A Dtopology_hints_test.go66 CPUs := [][]struct {
85 testPod1 := makeMultiContainerPod(CPUs[0], CPUs[0])
86 testPod2 := makeMultiContainerPod(CPUs[0], CPUs[1])
87 testPod3 := makeMultiContainerPod(CPUs[1], CPUs[0])
89 testPod4 := makeMultiContainerPod(CPUs[1], CPUs[1])
90 testPod5 := makeMultiContainerPod(CPUs[2], CPUs[2])
92 testPod6 := makeMultiContainerPod(CPUs[1], CPUs[2])
93 testPod7 := makeMultiContainerPod(CPUs[2], CPUs[1])
95 testPod8 := makeMultiContainerPod(CPUs[3], CPUs[3])
/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/doc/opal-api/
H A Dopal-reinit-cpus-70.rst12 This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
13 Consequently, all CPUs must be in OPAL for this call to succeed (either
32 On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
35 On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
38 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
44 This flag requests that CPUs be configured with TM (Transactional Memory)
53 For POWER9 CPUs, this is bit 8 of the HID register (see the POWER9 User Manual
58 Future CPUs may or may not do anything with these flags, but a host OS must
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/doc/opal-api/
H A Dopal-reinit-cpus-70.rst12 This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
13 Consequently, all CPUs must be in OPAL for this call to succeed (either
32 On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
35 On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
38 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
44 This flag requests that CPUs be configured with TM (Transactional Memory)
53 For POWER9 CPUs, this is bit 8 of the HID register (see the POWER9 User Manual
58 Future CPUs may or may not do anything with these flags, but a host OS must
/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/doc/opal-api/
H A Dopal-reinit-cpus-70.rst12 This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
13 Consequently, all CPUs must be in OPAL for this call to succeed (either
32 On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
35 On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
38 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
44 This flag requests that CPUs be configured with TM (Transactional Memory)
53 For POWER9 CPUs, this is bit 8 of the HID register (see the POWER9 User Manual
58 Future CPUs may or may not do anything with these flags, but a host OS must
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/doc/opal-api/
H A Dopal-reinit-cpus-70.rst12 This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
13 Consequently, all CPUs must be in OPAL for this call to succeed (either
32 On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
35 On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
38 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
44 This flag requests that CPUs be configured with TM (Transactional Memory)
53 For POWER9 CPUs, this is bit 8 of the HID register (see the POWER9 User Manual
58 Future CPUs may or may not do anything with these flags, but a host OS must
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/doc/opal-api/
H A Dopal-reinit-cpus-70.rst12 This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
13 Consequently, all CPUs must be in OPAL for this call to succeed (either
32 On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
35 On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
38 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
44 This flag requests that CPUs be configured with TM (Transactional Memory)
53 For POWER9 CPUs, this is bit 8 of the HID register (see the POWER9 User Manual
58 Future CPUs may or may not do anything with these flags, but a host OS must
/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/doc/opal-api/
H A Dopal-reinit-cpus-70.rst12 This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
13 Consequently, all CPUs must be in OPAL for this call to succeed (either
32 On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
35 On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
38 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
44 This flag requests that CPUs be configured with TM (Transactional Memory)
53 For POWER9 CPUs, this is bit 8 of the HID register (see the POWER9 User Manual
58 Future CPUs may or may not do anything with these flags, but a host OS must
/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/timers/
H A Dno_hz.rst65 Omit Scheduling-Clock Ticks For Idle CPUs
82 idle CPUs. That said, dyntick-idle mode is not free:
110 task implies also omitting them for idle CPUs.
114 and such CPUs are said to be "adaptive-ticks CPUs". This is important
127 CPUs. Note that you are prohibited from marking all of the CPUs as
171 slightly differently than those for non-adaptive-tick CPUs.
196 "1,3-5" selects CPUs 1, 3, 4, and 5.
255 CPUs, which can significantly reduce maximum performance.
295 interrupts and tasks to particular CPUs.
308 * Unless all CPUs are idle, at least one CPU must keep the
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/timers/
H A Dno_hz.rst65 Omit Scheduling-Clock Ticks For Idle CPUs
82 idle CPUs. That said, dyntick-idle mode is not free:
110 task implies also omitting them for idle CPUs.
114 and such CPUs are said to be "adaptive-ticks CPUs". This is important
127 CPUs. Note that you are prohibited from marking all of the CPUs as
171 slightly differently than those for non-adaptive-tick CPUs.
196 "1,3-5" selects CPUs 1, 3, 4, and 5.
255 CPUs, which can significantly reduce maximum performance.
295 interrupts and tasks to particular CPUs.
308 * Unless all CPUs are idle, at least one CPU must keep the
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/timers/
H A Dno_hz.rst65 Omit Scheduling-Clock Ticks For Idle CPUs
82 idle CPUs. That said, dyntick-idle mode is not free:
110 task implies also omitting them for idle CPUs.
114 and such CPUs are said to be "adaptive-ticks CPUs". This is important
127 CPUs. Note that you are prohibited from marking all of the CPUs as
171 slightly differently than those for non-adaptive-tick CPUs.
196 "1,3-5" selects CPUs 1, 3, 4, and 5.
255 CPUs, which can significantly reduce maximum performance.
295 interrupts and tasks to particular CPUs.
308 * Unless all CPUs are idle, at least one CPU must keep the
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/doc/opal-api/
H A Dopal-reinit-cpus-70.rst7 This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
8 Consequently, all CPUs must be in OPAL for this call to succeed (either
25 On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
28 On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
31 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
37 This flag requests that CPUs be configured with TM (Transactional Memory)

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