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Searched refs:CR1_OFFSET (Results 1 – 25 of 124) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/serial/
H A Dserial_stm32.c29 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
32 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
56 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
163 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
166 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
167 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/serial/
H A Dserial_stm32.c29 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
32 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
56 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
163 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
166 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
167 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/serial/
H A Dserial_stm32.c29 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
32 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
56 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
163 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
166 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
167 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/serial/
H A Dserial_stm32.c29 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
32 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
56 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
163 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
166 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
167 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/serial/
H A Dserial_stm32.c36 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
39 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); in _stm32_serial_setbrg()
63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
171 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()
174 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); in _stm32_serial_init()
175 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | in _stm32_serial_init()

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