/dports/www/grafana8/grafana-8.3.6/vendor/golang.org/x/exp/shiny/iconvg/testdata/ |
H A D | video-005.primitive.ivg.disassembly | 21 98 Set CREG[CSEL-0] to a 4 byte color 33 98 Set CREG[CSEL-0] to a 4 byte color 45 98 Set CREG[CSEL-0] to a 4 byte color 57 98 Set CREG[CSEL-0] to a 4 byte color 69 98 Set CREG[CSEL-0] to a 4 byte color 81 98 Set CREG[CSEL-0] to a 4 byte color 93 98 Set CREG[CSEL-0] to a 4 byte color 105 98 Set CREG[CSEL-0] to a 4 byte color 117 98 Set CREG[CSEL-0] to a 4 byte color 129 98 Set CREG[CSEL-0] to a 4 byte color [all …]
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H A D | gradient.ivg.disassembly | 3 98 Set CREG[CSEL-0] to a 4 byte color 19 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 23 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 27 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 31 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 47 98 Set CREG[CSEL-0] to a 4 byte color 63 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 67 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 71 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 95 98 Set CREG[CSEL-0] to a 4 byte color [all …]
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H A D | arcs.ivg.disassembly | 3 81 Set CREG[CSEL-1] to a 1 byte color 5 82 Set CREG[CSEL-2] to a 1 byte color 7 83 Set CREG[CSEL-3] to a 1 byte color 9 84 Set CREG[CSEL-4] to a 1 byte color 11 c1 Start path, filled with CREG[CSEL-1]; M (absolute moveTo) 24 c2 Start path, filled with CREG[CSEL-2]; M (absolute moveTo) 37 c3 Start path, filled with CREG[CSEL-3]; M (absolute moveTo) 86 c4 Start path, filled with CREG[CSEL-4]; M (absolute moveTo) 97 c4 Start path, filled with CREG[CSEL-4]; M (absolute moveTo) 108 c4 Start path, filled with CREG[CSEL-4]; M (absolute moveTo) [all …]
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H A D | elliptical.ivg.disassembly | 3 98 Set CREG[CSEL-0] to a 4 byte color 19 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 23 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 29 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 39 80 Set CREG[CSEL-0] to a 1 byte color 41 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 54 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 67 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo)
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H A D | cowbell.ivg.disassembly | 9 98 Set CREG[CSEL-0] to a 4 byte color 25 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 29 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 51 98 Set CREG[CSEL-0] to a 4 byte color 67 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 71 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 105 98 Set CREG[CSEL-0] to a 4 byte color 129 90 Set CREG[CSEL-0] to a 3 byte (direct) color 218 98 Set CREG[CSEL-0] to a 4 byte color 234 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ [all …]
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H A D | favicon.ivg.disassembly | 7 91 Set CREG[CSEL-1] to a 3 byte (direct) color 9 a1 Set CREG[CSEL-1] to a 3 byte (indirect) color 11 ff c0: CREG[63] 13 c1 Start path, filled with CREG[CSEL-1]; M (absolute moveTo) 121 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 625 80 Set CREG[CSEL-0] to a 1 byte color 627 91 Set CREG[CSEL-1] to a 3 byte (direct) color 629 9a Set CREG[CSEL-2] to a 4 byte color 631 93 Set CREG[CSEL-3] to a 3 byte (direct) color 633 94 Set CREG[CSEL-4] to a 3 byte (direct) color [all …]
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H A D | lod-polygon.ivg.disassembly | 3 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 14 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 27 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 46 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo)
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/dports/net-mgmt/thanos/thanos-0.11.0/vendor/golang.org/x/exp/shiny/iconvg/testdata/ |
H A D | video-005.primitive.ivg.disassembly | 21 98 Set CREG[CSEL-0] to a 4 byte color 33 98 Set CREG[CSEL-0] to a 4 byte color 45 98 Set CREG[CSEL-0] to a 4 byte color 57 98 Set CREG[CSEL-0] to a 4 byte color 69 98 Set CREG[CSEL-0] to a 4 byte color 81 98 Set CREG[CSEL-0] to a 4 byte color 93 98 Set CREG[CSEL-0] to a 4 byte color 105 98 Set CREG[CSEL-0] to a 4 byte color 117 98 Set CREG[CSEL-0] to a 4 byte color 129 98 Set CREG[CSEL-0] to a 4 byte color [all …]
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H A D | gradient.ivg.disassembly | 3 98 Set CREG[CSEL-0] to a 4 byte color 19 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 23 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 27 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 31 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 47 98 Set CREG[CSEL-0] to a 4 byte color 63 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 67 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 71 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 95 98 Set CREG[CSEL-0] to a 4 byte color [all …]
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H A D | arcs.ivg.disassembly | 3 81 Set CREG[CSEL-1] to a 1 byte color 5 82 Set CREG[CSEL-2] to a 1 byte color 7 83 Set CREG[CSEL-3] to a 1 byte color 9 84 Set CREG[CSEL-4] to a 1 byte color 11 c1 Start path, filled with CREG[CSEL-1]; M (absolute moveTo) 24 c2 Start path, filled with CREG[CSEL-2]; M (absolute moveTo) 37 c3 Start path, filled with CREG[CSEL-3]; M (absolute moveTo) 86 c4 Start path, filled with CREG[CSEL-4]; M (absolute moveTo) 97 c4 Start path, filled with CREG[CSEL-4]; M (absolute moveTo) 108 c4 Start path, filled with CREG[CSEL-4]; M (absolute moveTo) [all …]
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H A D | elliptical.ivg.disassembly | 3 98 Set CREG[CSEL-0] to a 4 byte color 19 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 23 87 Set CREG[CSEL-0] to a 1 byte color; CSEL++ 29 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 39 80 Set CREG[CSEL-0] to a 1 byte color 41 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 54 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 67 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo)
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H A D | cowbell.ivg.disassembly | 9 98 Set CREG[CSEL-0] to a 4 byte color 25 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 29 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 51 98 Set CREG[CSEL-0] to a 4 byte color 67 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 71 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ 105 98 Set CREG[CSEL-0] to a 4 byte color 129 90 Set CREG[CSEL-0] to a 3 byte (direct) color 218 98 Set CREG[CSEL-0] to a 4 byte color 234 97 Set CREG[CSEL-0] to a 3 byte (direct) color; CSEL++ [all …]
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H A D | favicon.ivg.disassembly | 7 91 Set CREG[CSEL-1] to a 3 byte (direct) color 9 a1 Set CREG[CSEL-1] to a 3 byte (indirect) color 11 ff c0: CREG[63] 13 c1 Start path, filled with CREG[CSEL-1]; M (absolute moveTo) 121 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 625 80 Set CREG[CSEL-0] to a 1 byte color 627 91 Set CREG[CSEL-1] to a 3 byte (direct) color 629 9a Set CREG[CSEL-2] to a 4 byte color 631 93 Set CREG[CSEL-3] to a 3 byte (direct) color 633 94 Set CREG[CSEL-4] to a 3 byte (direct) color [all …]
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H A D | lod-polygon.ivg.disassembly | 3 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 14 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 27 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo) 46 c0 Start path, filled with CREG[CSEL-0]; M (absolute moveTo)
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/dports/devel/avr-gdb/gdb-7.3.1/sim/cr16/ |
H A D | cr16_sim.h | 322 #define PSR CREG (PSR_CR) 366 #define PC CREG (PC_CR) 370 #define BPSR CREG (BPSR_CR) 373 #define BPC CREG (BPC_CR) 376 #define DPSR CREG (DPSR_CR) 379 #define DPC CREG (DPC_CR) 382 #define RPT_C CREG (RPT_C_CR) 385 #define RPT_S CREG (RPT_S_CR) 388 #define RPT_E CREG (RPT_E_CR) 391 #define MOD_S CREG (MOD_S_CR) [all …]
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/dports/devel/gdb761/gdb-7.6.1/sim/cr16/ |
H A D | cr16_sim.h | 322 #define PSR CREG (PSR_CR) 366 #define PC CREG (PC_CR) 370 #define BPSR CREG (BPSR_CR) 373 #define BPC CREG (BPC_CR) 376 #define DPSR CREG (DPSR_CR) 379 #define DPC CREG (DPC_CR) 382 #define RPT_C CREG (RPT_C_CR) 385 #define RPT_S CREG (RPT_S_CR) 388 #define RPT_E CREG (RPT_E_CR) 391 #define MOD_S CREG (MOD_S_CR) [all …]
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/dports/cad/yosys/yosys-yosys-0.12/techlibs/xilinx/tests/ |
H A D | test_dsp48a1_model.v | 8 parameter integer CREG = 1; constant 145 .CREG (CREG), 189 .CREG (CREG), 236 .CREG (CREG), 285 .CREG (0), 303 .CREG (1), 321 .CREG (1),
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H A D | test_dsp48_model.v | 6 parameter integer CREG = 1; constant 160 .CREG (CREG), 203 .CREG (CREG), 248 .CREG (0), 263 .CREG (1), 278 .CREG (1),
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H A D | test_dsp_model.v | 15 parameter integer CREG = 1; constant 220 .CREG (CREG), 302 .CREG (CREG), 386 .CREG (0), 421 .CREG (1), 456 .CREG (0), 491 .CREG (1), 526 .CREG (1), 561 .CREG (0), 597 .CREG (0), [all …]
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/dports/devel/avr-gdb/gdb-7.3.1/sim/d10v/ |
H A D | d10v_sim.h | 318 #define PSW CREG (PSW_CR) 362 #define PC CREG (PC_CR) 365 #define BPSW CREG (BPSW_CR) 368 #define BPC CREG (BPC_CR) 371 #define DPSW CREG (DPSW_CR) 374 #define DPC CREG (DPC_CR) 377 #define RPT_C CREG (RPT_C_CR) 380 #define RPT_S CREG (RPT_S_CR) 383 #define RPT_E CREG (RPT_E_CR) 386 #define MOD_S CREG (MOD_S_CR) [all …]
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/dports/devel/gdb761/gdb-7.6.1/sim/d10v/ |
H A D | d10v_sim.h | 318 #define PSW CREG (PSW_CR) 362 #define PC CREG (PC_CR) 365 #define BPSW CREG (BPSW_CR) 368 #define BPC CREG (BPC_CR) 371 #define DPSW CREG (DPSW_CR) 374 #define DPC CREG (DPC_CR) 377 #define RPT_C CREG (RPT_C_CR) 380 #define RPT_S CREG (RPT_S_CR) 383 #define RPT_E CREG (RPT_E_CR) 386 #define MOD_S CREG (MOD_S_CR) [all …]
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/d10v/ |
H A D | d10v_sim.h | 318 #define PSW CREG (PSW_CR) 362 #define PC CREG (PC_CR) 365 #define BPSW CREG (BPSW_CR) 368 #define BPC CREG (BPC_CR) 371 #define DPSW CREG (DPSW_CR) 374 #define DPC CREG (DPC_CR) 377 #define RPT_C CREG (RPT_C_CR) 380 #define RPT_S CREG (RPT_S_CR) 383 #define RPT_E CREG (RPT_E_CR) 386 #define MOD_S CREG (MOD_S_CR) [all …]
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/d10v/ |
H A D | d10v_sim.h | 318 #define PSW CREG (PSW_CR) 362 #define PC CREG (PC_CR) 365 #define BPSW CREG (BPSW_CR) 368 #define BPC CREG (BPC_CR) 371 #define DPSW CREG (DPSW_CR) 374 #define DPC CREG (DPC_CR) 377 #define RPT_C CREG (RPT_C_CR) 380 #define RPT_S CREG (RPT_S_CR) 383 #define RPT_E CREG (RPT_E_CR) 386 #define MOD_S CREG (MOD_S_CR) [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/PowerPC/ |
H A D | knowCRBitSpill.ll | 20 ; CHECK-DAG: crnor [[CREG:.*]]*cr5+lt, eq, eq 21 ; CHECK-DAG: mfocrf [[REG2:.*]], [[CREG]] 24 ; CHECK-DAG: creqv [[CREG:.*]]*cr5+lt, [[CREG]]*cr5+lt, [[CREG]]*cr5+lt 27 ; CHECK-NOT: mfocrf [[REG2:.*]], [[CREG]] 84 ; CHECK-DAG: crxor [[CREG:.*]]*cr5+lt, [[CREG]]*cr5+lt, [[CREG]]*cr5+lt 86 ; CHECK-NOT: mfocrf [[REG2:.*]], [[CREG]]
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/dports/net-mgmt/wmi-client/wmi-1.3.16/Samba/source/lib/registry/ |
H A D | reg_backend_w95.c | 124 } CREG; typedef 155 static void parse_rgkn_block(CREG *creg, off_t start_off, off_t end_off) 173 static void parse_rgdb_block(CREG *creg, RGDB_HDR *rgdb_hdr) in parse_rgdb_block() 188 CREG *creg; in w95_open_reg() 193 creg = talloc(h, CREG); in w95_open_reg() 194 memset(creg, 0, sizeof(CREG)); in w95_open_reg() 274 CREG *creg = parent->hive->backend_data; in w95_get_subkey_by_index() 311 …RGDB_KEY *rgdb_key = LOCN_RGDB_KEY((CREG *)k->hive->backend_data, rgkn_key->id.rgdb, rgkn_key->id.… in w95_num_values() 325 …RGDB_KEY *rgdb_key = LOCN_RGDB_KEY((CREG *)k->hive->backend_data, rgkn_key->id.rgdb, rgkn_key->id.… in w95_get_value_by_id()
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