/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/gpio/ |
H A D | rk3399_gpio.c | 94 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 96 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 102 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 104 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 110 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 112 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 140 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 145 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 151 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 329 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in plat_rockchip_save_gpio() [all …]
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/gpio/ |
H A D | rk3399_gpio.c | 94 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 96 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 102 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 104 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 110 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 112 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 140 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 145 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 151 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 329 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in plat_rockchip_save_gpio() [all …]
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/gpio/ |
H A D | rk3399_gpio.c | 94 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 96 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 102 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 104 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 110 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 112 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 140 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 145 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 151 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 329 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in plat_rockchip_save_gpio() [all …]
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/gpio/ |
H A D | rk3399_gpio.c | 94 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 96 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 102 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 104 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 110 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 112 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 140 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 145 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 151 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 329 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in plat_rockchip_save_gpio() [all …]
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/gpio/ |
H A D | rk3399_gpio.c | 94 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 96 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 102 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 104 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 110 CRU_CLKGATE_CON(31)) >> in gpio_get_clock() 112 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock() 140 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 145 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 151 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock() 329 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in plat_rockchip_save_gpio() [all …]
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/rk3328/drivers/pmu/ |
H A D | pmu.c | 255 mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(i)); in clks_gating_suspend() 256 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_suspend() 266 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_resume() 517 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in ddr_suspend() 519 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in ddr_suspend() 521 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in ddr_suspend() 523 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(27), in ddr_suspend() 534 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in dmc_restore() 536 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in dmc_restore() 538 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in dmc_restore() [all …]
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/rk3328/drivers/pmu/ |
H A D | pmu.c | 255 mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(i)); in clks_gating_suspend() 256 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_suspend() 266 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_resume() 517 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in ddr_suspend() 519 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in ddr_suspend() 521 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in ddr_suspend() 523 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(27), in ddr_suspend() 534 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in dmc_restore() 536 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in dmc_restore() 538 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in dmc_restore() [all …]
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/rk3328/drivers/pmu/ |
H A D | pmu.c | 255 mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(i)); in clks_gating_suspend() 256 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_suspend() 266 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_resume() 517 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in ddr_suspend() 519 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in ddr_suspend() 521 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in ddr_suspend() 523 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(27), in ddr_suspend() 534 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in dmc_restore() 536 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in dmc_restore() 538 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in dmc_restore() [all …]
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/rk3328/drivers/pmu/ |
H A D | pmu.c | 255 mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(i)); in clks_gating_suspend() 256 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_suspend() 266 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_resume() 517 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in ddr_suspend() 519 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in ddr_suspend() 521 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in ddr_suspend() 523 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(27), in ddr_suspend() 534 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in dmc_restore() 536 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in dmc_restore() 538 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in dmc_restore() [all …]
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/rk3328/drivers/pmu/ |
H A D | pmu.c | 255 mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(i)); in clks_gating_suspend() 256 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_suspend() 266 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_resume() 517 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in ddr_suspend() 519 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in ddr_suspend() 521 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in ddr_suspend() 523 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(27), in ddr_suspend() 534 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in dmc_restore() 536 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in dmc_restore() 538 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in dmc_restore() [all …]
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/px30/drivers/soc/ |
H A D | soc.h | 63 #define CRU_CLKGATE_CON 0x200 macro 64 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + (i) * 4)
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/px30/drivers/soc/ |
H A D | soc.h | 63 #define CRU_CLKGATE_CON 0x200 macro 64 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + (i) * 4)
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/px30/drivers/soc/ |
H A D | soc.h | 63 #define CRU_CLKGATE_CON 0x200 macro 64 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + (i) * 4)
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/px30/drivers/soc/ |
H A D | soc.h | 63 #define CRU_CLKGATE_CON 0x200 macro 64 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + (i) * 4)
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/px30/drivers/soc/ |
H A D | soc.h | 63 #define CRU_CLKGATE_CON 0x200 macro 64 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + (i) * 4)
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/rk3288/drivers/soc/ |
H A D | soc.h | 45 #define CRU_CLKGATE_CON 0x160 macro 46 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/rk3288/drivers/soc/ |
H A D | soc.h | 45 #define CRU_CLKGATE_CON 0x160 macro 46 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/rk3288/drivers/soc/ |
H A D | soc.h | 45 #define CRU_CLKGATE_CON 0x160 macro 46 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/rk3288/drivers/soc/ |
H A D | soc.h | 45 #define CRU_CLKGATE_CON 0x160 macro 46 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/rk3288/drivers/soc/ |
H A D | soc.h | 45 #define CRU_CLKGATE_CON 0x160 macro 46 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/rk3368/drivers/soc/ |
H A D | soc.h | 83 #define CRU_CLKGATE_CON 0x200 macro 84 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/rk3368/drivers/soc/ |
H A D | soc.h | 83 #define CRU_CLKGATE_CON 0x200 macro 84 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/rk3368/drivers/soc/ |
H A D | soc.h | 83 #define CRU_CLKGATE_CON 0x200 macro 84 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/rk3368/drivers/soc/ |
H A D | soc.h | 83 #define CRU_CLKGATE_CON 0x200 macro 84 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/rk3368/drivers/soc/ |
H A D | soc.h | 83 #define CRU_CLKGATE_CON 0x200 macro 84 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
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