| /dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/lib/sbi/ |
| H A D | sbi_emulate_csr.c | 101 case CSR_MHPMEVENT3: in sbi_emulate_csr_read()
102 *csr_val = csr_read(CSR_MHPMEVENT3); in sbi_emulate_csr_read()
169 case CSR_MHPMEVENT3: in sbi_emulate_csr_write()
170 csr_write(CSR_MHPMEVENT3, csr_val); in sbi_emulate_csr_write()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/lib/sbi/ |
| H A D | sbi_emulate_csr.c | 101 case CSR_MHPMEVENT3: in sbi_emulate_csr_read()
102 *csr_val = csr_read(CSR_MHPMEVENT3); in sbi_emulate_csr_read()
169 case CSR_MHPMEVENT3: in sbi_emulate_csr_write()
170 csr_write(CSR_MHPMEVENT3, csr_val); in sbi_emulate_csr_write()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/lib/sbi/ |
| H A D | sbi_emulate_csr.c | 101 case CSR_MHPMEVENT3: in sbi_emulate_csr_read()
102 *csr_val = csr_read(CSR_MHPMEVENT3); in sbi_emulate_csr_read()
169 case CSR_MHPMEVENT3: in sbi_emulate_csr_write()
170 csr_write(CSR_MHPMEVENT3, csr_val); in sbi_emulate_csr_write()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/lib/sbi/ |
| H A D | sbi_emulate_csr.c | 101 case CSR_MHPMEVENT3: in sbi_emulate_csr_read()
102 *csr_val = csr_read(CSR_MHPMEVENT3); in sbi_emulate_csr_read()
169 case CSR_MHPMEVENT3: in sbi_emulate_csr_write()
170 csr_write(CSR_MHPMEVENT3, csr_val); in sbi_emulate_csr_write()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 195 #define CSR_MHPMEVENT3 0x323 macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 195 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 195 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 195 #define CSR_MHPMEVENT3 0x323 macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/riscv/ |
| H A D | cpu_bits.h | 147 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 195 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/ |
| H A D | cpu_bits.h | 257 #define CSR_MHPMEVENT3 0x323 macro
|
| H A D | gdbstub.c | 215 CSR_MHPMEVENT3,
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| /dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
| H A D | gdbstub.c | 217 CSR_MHPMEVENT3,
|
| H A D | cpu_bits.h | 298 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
| H A D | gdbstub.c | 217 CSR_MHPMEVENT3,
|
| H A D | cpu_bits.h | 280 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu42/qemu-4.2.1/target/riscv/ |
| H A D | gdbstub.c | 215 CSR_MHPMEVENT3,
|
| H A D | cpu_bits.h | 257 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/ |
| H A D | cpu_bits.h | 278 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
| H A D | cpu_bits.h | 280 #define CSR_MHPMEVENT3 0x323 macro
|
| H A D | gdbstub.c | 222 CSR_MHPMEVENT3,
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| /dports/emulators/qemu/qemu-6.2.0/target/riscv/ |
| H A D | cpu_bits.h | 278 #define CSR_MHPMEVENT3 0x323 macro
|
| /dports/emulators/qemu60/qemu-6.0.0/target/riscv/ |
| H A D | cpu_bits.h | 298 #define CSR_MHPMEVENT3 0x323 macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 366 #define CSR_MHPMEVENT3 0x323 macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 366 #define CSR_MHPMEVENT3 0x323 macro
|