| /dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/lib/sbi/ |
| H A D | riscv_asm.c | 43 case CSR_PMPADDR4: in csr_read_num()
44 ret = csr_read(CSR_PMPADDR4); in csr_read_num()
113 case CSR_PMPADDR4: in csr_write_num()
114 csr_write(CSR_PMPADDR4, val); in csr_write_num()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/lib/sbi/ |
| H A D | riscv_asm.c | 43 case CSR_PMPADDR4: in csr_read_num()
44 ret = csr_read(CSR_PMPADDR4); in csr_read_num()
113 case CSR_PMPADDR4: in csr_write_num()
114 csr_write(CSR_PMPADDR4, val); in csr_write_num()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/lib/sbi/ |
| H A D | riscv_asm.c | 76 case CSR_PMPADDR4: in csr_read_num()
77 ret = csr_read(CSR_PMPADDR4); in csr_read_num()
146 case CSR_PMPADDR4: in csr_write_num()
147 csr_write(CSR_PMPADDR4, val); in csr_write_num()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/lib/sbi/ |
| H A D | riscv_asm.c | 120 case CSR_PMPADDR4: in csr_read_num()
121 ret = csr_read(CSR_PMPADDR4); in csr_read_num()
190 case CSR_PMPADDR4: in csr_write_num()
191 csr_write(CSR_PMPADDR4, val); in csr_write_num()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/opensbi/platform/thead/c910/ |
| H A D | platform.c | 33 c910_regs.pmpaddr4 = csr_read(CSR_PMPADDR4); in c910_early_init()
54 csr_write(CSR_PMPADDR4, c910_regs.pmpaddr4); in c910_early_init()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/platform/thead/c910/ |
| H A D | platform.c | 33 c910_regs.pmpaddr4 = csr_read(CSR_PMPADDR4); in c910_early_init()
54 csr_write(CSR_PMPADDR4, c910_regs.pmpaddr4); in c910_early_init()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/platform/thead/c910/ |
| H A D | platform.c | 26 c910_regs.pmpaddr4 = csr_read(CSR_PMPADDR4); in c910_early_init()
47 csr_write(CSR_PMPADDR4, c910_regs.pmpaddr4); in c910_early_init()
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| /dports/sysutils/opensbi/opensbi-0.9/platform/thead/c910/ |
| H A D | platform.c | 33 c910_regs.pmpaddr4 = csr_read(CSR_PMPADDR4); in c910_early_init()
54 csr_write(CSR_PMPADDR4, c910_regs.pmpaddr4); in c910_early_init()
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| /dports/emulators/qemu/qemu-6.2.0/roms/opensbi/platform/thead/c910/ |
| H A D | platform.c | 33 c910_regs.pmpaddr4 = csr_read(CSR_PMPADDR4); in c910_early_init()
54 csr_write(CSR_PMPADDR4, c910_regs.pmpaddr4); in c910_early_init()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/riscv/ |
| H A D | op_helper.c | 357 case CSR_PMPADDR4: in csr_write_helper()
590 case CSR_PMPADDR4: in csr_read_helper()
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| H A D | cpu_bits.h | 95 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 237 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 237 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 237 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 237 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 237 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/ |
| H A D | cpu_bits.h | 203 #define CSR_PMPADDR4 0x3b4 macro
|
| H A D | gdbstub.c | 141 CSR_PMPADDR4,
|
| /dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
| H A D | gdbstub.c | 143 CSR_PMPADDR4,
|
| H A D | cpu_bits.h | 244 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
| H A D | gdbstub.c | 143 CSR_PMPADDR4,
|
| H A D | cpu_bits.h | 226 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu42/qemu-4.2.1/target/riscv/ |
| H A D | gdbstub.c | 141 CSR_PMPADDR4,
|
| H A D | cpu_bits.h | 203 #define CSR_PMPADDR4 0x3b4 macro
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/ |
| H A D | cpu_bits.h | 224 #define CSR_PMPADDR4 0x3b4 macro
|