Home
last modified time | relevance | path

Searched refs:CTL_START (Results 1 – 25 of 25) sorted by relevance

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/i2c/
H A Dpm_smbus.c49 #define CTL_START (1 << 6) macro
279 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
280 if (val & CTL_START) { in smb_ioport_writeb()
/dports/lang/yap/yap-6.2.2/packages/sgml/
H A Dcatalog.h49 { CTL_START, enumerator
H A Dcatalog.c229 register_catalog_file_unlocked(buf, CTL_START); in init_catalog()
232 register_catalog_file_unlocked(path, CTL_START); in init_catalog()
H A Dsgml2pl.c2562 loc = CTL_START; in pl_sgml_register_catalog_file()
/dports/lang/swi-pl/swipl-8.2.3/packages/sgml/
H A Dcatalog.h59 { CTL_START, enumerator
H A Dcatalog.c251 register_catalog_file_unlocked(buf, CTL_START); in init_catalog()
254 register_catalog_file_unlocked(path, CTL_START); in init_catalog()
H A Dsgml2pl.c2824 loc = CTL_START; in pl_sgml_register_catalog_file()
/dports/emulators/qemu42/qemu-4.2.1/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6) macro
327 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
328 if (val & CTL_START) { in smb_ioport_writeb()
/dports/emulators/qemu/qemu-6.2.0/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6) macro
326 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
327 if (val & CTL_START) { in smb_ioport_writeb()
/dports/emulators/qemu60/qemu-6.0.0/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6) macro
326 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
327 if (val & CTL_START) { in smb_ioport_writeb()
/dports/emulators/qemu5/qemu-5.2.0/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6) macro
326 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
327 if (val & CTL_START) { in smb_ioport_writeb()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6) macro
327 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
328 if (val & CTL_START) { in smb_ioport_writeb()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6)
327 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */
328 if (val & CTL_START) {
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6) macro
327 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
328 if (val & CTL_START) { in smb_ioport_writeb()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/i2c/
H A Dpm_smbus.c51 #define CTL_START (1 << 6) macro
326 s->smb_ctl = val & ~CTL_START; /* CTL_START always reads 0 */ in smb_ioport_writeb()
327 if (val & CTL_START) { in smb_ioport_writeb()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_ctl.c21 #define CTL_START 0x01C macro
91 DPU_REG_WRITE(&ctx->hw, CTL_START, 0x1); in dpu_hw_ctl_trigger_start()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_ctl.c21 #define CTL_START 0x01C macro
91 DPU_REG_WRITE(&ctx->hw, CTL_START, 0x1); in dpu_hw_ctl_trigger_start()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_ctl.c21 #define CTL_START 0x01C macro
91 DPU_REG_WRITE(&ctx->hw, CTL_START, 0x1); in dpu_hw_ctl_trigger_start()
/dports/audio/x42-plugins-lv2/x42-plugins-20211016/meters.lv2/src/
H A Duris.h181 CTL_START, enumerator
H A Dsigdistlv2.c234 case CTL_START: in sdh_run()
H A Dbitmeter.c209 case CTL_START: in bim_run()
H A Debulv2.cc282 case CTL_START: in ebur128_run()
/dports/audio/x42-plugins-lv2/x42-plugins-20211016/meters.lv2/gui/
H A Dsdhmeter.c502 forge_message_kv(ui, ui->uris.mtr_meters_cfg, CTL_START, 0); in btn_start()
H A Dbitmeter.c475 forge_message_kv (ui, ui->uris.mtr_meters_cfg, CTL_START, 0); in cb_btn_freeze()
H A Debur.c1301 forge_message_kv(ui, ui->uris.mtr_meters_cfg, CTL_START, 0); in btn_start()