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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/InstCombine/
H A Dknown-non-zero.ll17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
144 ; CHECK-NEXT: ret i64 [[CTZ]]
167 ; CHECK-NEXT: ret i64 [[CTZ]]
190 ; CHECK-NEXT: ret i64 [[CTZ]]
213 ; CHECK-NEXT: ret i64 [[CTZ]]
236 ; CHECK-NEXT: ret i64 [[CTZ]]
259 ; CHECK-NEXT: ret i64 [[CTZ]]
282 ; CHECK-NEXT: ret i64 [[CTZ]]
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/InstCombine/
H A Dknown-non-zero.ll17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
144 ; CHECK-NEXT: ret i64 [[CTZ]]
167 ; CHECK-NEXT: ret i64 [[CTZ]]
190 ; CHECK-NEXT: ret i64 [[CTZ]]
213 ; CHECK-NEXT: ret i64 [[CTZ]]
236 ; CHECK-NEXT: ret i64 [[CTZ]]
259 ; CHECK-NEXT: ret i64 [[CTZ]]
282 ; CHECK-NEXT: ret i64 [[CTZ]]
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A Dknown-non-zero.ll17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
144 ; CHECK-NEXT: ret i64 [[CTZ]]
167 ; CHECK-NEXT: ret i64 [[CTZ]]
190 ; CHECK-NEXT: ret i64 [[CTZ]]
213 ; CHECK-NEXT: ret i64 [[CTZ]]
236 ; CHECK-NEXT: ret i64 [[CTZ]]
259 ; CHECK-NEXT: ret i64 [[CTZ]]
282 ; CHECK-NEXT: ret i64 [[CTZ]]
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/InstCombine/
H A Dknown-non-zero.ll17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
144 ; CHECK-NEXT: ret i64 [[CTZ]]
167 ; CHECK-NEXT: ret i64 [[CTZ]]
190 ; CHECK-NEXT: ret i64 [[CTZ]]
213 ; CHECK-NEXT: ret i64 [[CTZ]]
236 ; CHECK-NEXT: ret i64 [[CTZ]]
259 ; CHECK-NEXT: ret i64 [[CTZ]]
282 ; CHECK-NEXT: ret i64 [[CTZ]]
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A Dknown-non-zero.ll17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
144 ; CHECK-NEXT: ret i64 [[CTZ]]
167 ; CHECK-NEXT: ret i64 [[CTZ]]
190 ; CHECK-NEXT: ret i64 [[CTZ]]
213 ; CHECK-NEXT: ret i64 [[CTZ]]
236 ; CHECK-NEXT: ret i64 [[CTZ]]
259 ; CHECK-NEXT: ret i64 [[CTZ]]
282 ; CHECK-NEXT: ret i64 [[CTZ]]
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/InstCombine/
H A Dknown-non-zero.ll17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
144 ; CHECK-NEXT: ret i64 [[CTZ]]
167 ; CHECK-NEXT: ret i64 [[CTZ]]
190 ; CHECK-NEXT: ret i64 [[CTZ]]
213 ; CHECK-NEXT: ret i64 [[CTZ]]
236 ; CHECK-NEXT: ret i64 [[CTZ]]
259 ; CHECK-NEXT: ret i64 [[CTZ]]
282 ; CHECK-NEXT: ret i64 [[CTZ]]
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A Dknown-non-zero.ll17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
144 ; CHECK-NEXT: ret i64 [[CTZ]]
167 ; CHECK-NEXT: ret i64 [[CTZ]]
190 ; CHECK-NEXT: ret i64 [[CTZ]]
213 ; CHECK-NEXT: ret i64 [[CTZ]]
236 ; CHECK-NEXT: ret i64 [[CTZ]]
259 ; CHECK-NEXT: ret i64 [[CTZ]]
282 ; CHECK-NEXT: ret i64 [[CTZ]]
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/InstCombine/
H A Dknown-non-zero.ll16 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.cttz.i64(i64 [[X]], i1 false), !range !0
17 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 false), !range !0
44 ; CHECK-NEXT: [[CTZ32:%.*]] = trunc i64 [[CTZ]] to i32
72 ; CHECK-NEXT: [[CTZ:%.*]] = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> [[X]], i1 false)
75 ; CHECK-NEXT: [[RES:%.*]] = phi <8 x i64> [ [[CTZ]], [[NON_ZERO]] ], [ zeroinitializer, [[START:…
/dports/sysutils/slider/Slider-7bf0423/
H A Ddragonfly-hammer-history.ads27 package CTZ renames Ada.Calendar.Time_Zones; packspec
77 tz_offset : constant CTZ.Time_Offset := CTZ.UTC_Time_Offset;
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/SimplifyCFG/AArch64/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/SimplifyCFG/Mips/
H A Dcttz-ctlz.ll6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
7 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
25 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
26 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]

12345678910>>...33