/dports/devel/llvm80/llvm-8.0.1.src/lib/Support/ |
H A D | KnownBits.cpp | 22 bool CarryIn = false; in computeForAddSub() local 26 CarryIn = true; in computeForAddSub() 29 APInt PossibleSumZero = ~LHS.Zero + ~RHS.Zero + CarryIn; in computeForAddSub() 30 APInt PossibleSumOne = LHS.One + RHS.One + CarryIn; in computeForAddSub()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Support/ |
H A D | KnownBits.cpp | 22 bool CarryIn = false; in computeForAddSub() local 26 CarryIn = true; in computeForAddSub() 29 APInt PossibleSumZero = ~LHS.Zero + ~RHS.Zero + CarryIn; in computeForAddSub() 30 APInt PossibleSumOne = LHS.One + RHS.One + CarryIn; in computeForAddSub()
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/dports/math/mpir/mpir-3.0.0/mpn/x86_64/haswell/ |
H A D | sub_n.as | 28 %define CarryIn 36 %define CarryIn r8 38 %define LIMB2 r8 ; may reuse CarryIn 51 neg CarryIn ; Set CF iff CarryIn != 0
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H A D | add_n.as | 28 %define CarryIn 36 %define CarryIn r8 38 %define LIMB2 r8 ; may reuse CarryIn 51 neg CarryIn ; Set CF iff CarryIn != 0
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 552 const SrcOp &CarryIn) { in buildUAdde() argument 554 {Op0, Op1, CarryIn}); in buildUAdde() 560 const SrcOp &CarryIn) { in buildUSube() argument 562 {Op0, Op1, CarryIn}); in buildUSube() 568 const SrcOp &CarryIn) { in buildSAdde() argument 570 {Op0, Op1, CarryIn}); in buildSAdde() 576 const SrcOp &CarryIn) { in buildSSube() argument 578 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/devel/llvm11/llvm-11.0.1.src/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 552 const SrcOp &CarryIn) { in buildUAdde() argument 554 {Op0, Op1, CarryIn}); in buildUAdde() 560 const SrcOp &CarryIn) { in buildUSube() argument 562 {Op0, Op1, CarryIn}); in buildUSube() 568 const SrcOp &CarryIn) { in buildSAdde() argument 570 {Op0, Op1, CarryIn}); in buildSAdde() 576 const SrcOp &CarryIn) { in buildSSube() argument 578 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 554 const SrcOp &CarryIn) { in buildUAdde() argument 556 {Op0, Op1, CarryIn}); in buildUAdde() 562 const SrcOp &CarryIn) { in buildUSube() argument 564 {Op0, Op1, CarryIn}); in buildUSube() 570 const SrcOp &CarryIn) { in buildSAdde() argument 572 {Op0, Op1, CarryIn}); in buildSAdde() 578 const SrcOp &CarryIn) { in buildSSube() argument 580 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 551 const SrcOp &CarryIn) { in buildUAdde() argument 553 {Op0, Op1, CarryIn}); in buildUAdde() 559 const SrcOp &CarryIn) { in buildUSube() argument 561 {Op0, Op1, CarryIn}); in buildUSube() 567 const SrcOp &CarryIn) { in buildSAdde() argument 569 {Op0, Op1, CarryIn}); in buildSAdde() 575 const SrcOp &CarryIn) { in buildSSube() argument 577 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 551 const SrcOp &CarryIn) { in buildUAdde() argument 553 {Op0, Op1, CarryIn}); in buildUAdde() 559 const SrcOp &CarryIn) { in buildUSube() argument 561 {Op0, Op1, CarryIn}); in buildUSube() 567 const SrcOp &CarryIn) { in buildSAdde() argument 569 {Op0, Op1, CarryIn}); in buildSAdde() 575 const SrcOp &CarryIn) { in buildSSube() argument 577 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 559 const SrcOp &CarryIn) { in buildUAdde() argument 561 {Op0, Op1, CarryIn}); in buildUAdde() 567 const SrcOp &CarryIn) { in buildUSube() argument 569 {Op0, Op1, CarryIn}); in buildUSube() 575 const SrcOp &CarryIn) { in buildSAdde() argument 577 {Op0, Op1, CarryIn}); in buildSAdde() 583 const SrcOp &CarryIn) { in buildSSube() argument 585 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 551 const SrcOp &CarryIn) { in buildUAdde() argument 553 {Op0, Op1, CarryIn}); in buildUAdde() 559 const SrcOp &CarryIn) { in buildUSube() argument 561 {Op0, Op1, CarryIn}); in buildUSube() 567 const SrcOp &CarryIn) { in buildSAdde() argument 569 {Op0, Op1, CarryIn}); in buildSAdde() 575 const SrcOp &CarryIn) { in buildSSube() argument 577 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 551 const SrcOp &CarryIn) { in buildUAdde() argument 553 {Op0, Op1, CarryIn}); in buildUAdde() 559 const SrcOp &CarryIn) { in buildUSube() argument 561 {Op0, Op1, CarryIn}); in buildUSube() 567 const SrcOp &CarryIn) { in buildSAdde() argument 569 {Op0, Op1, CarryIn}); in buildSAdde() 575 const SrcOp &CarryIn) { in buildSSube() argument 577 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 551 const SrcOp &CarryIn) { in buildUAdde() argument 553 {Op0, Op1, CarryIn}); in buildUAdde() 559 const SrcOp &CarryIn) { in buildUSube() argument 561 {Op0, Op1, CarryIn}); in buildUSube() 567 const SrcOp &CarryIn) { in buildSAdde() argument 569 {Op0, Op1, CarryIn}); in buildSAdde() 575 const SrcOp &CarryIn) { in buildSSube() argument 577 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 559 const SrcOp &CarryIn) { in buildUAdde() argument 561 {Op0, Op1, CarryIn}); in buildUAdde() 567 const SrcOp &CarryIn) { in buildUSube() argument 569 {Op0, Op1, CarryIn}); in buildUSube() 575 const SrcOp &CarryIn) { in buildSAdde() argument 577 {Op0, Op1, CarryIn}); in buildSAdde() 583 const SrcOp &CarryIn) { in buildSSube() argument 585 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 551 const SrcOp &CarryIn) { in buildUAdde() argument 553 {Op0, Op1, CarryIn}); in buildUAdde() 559 const SrcOp &CarryIn) { in buildUSube() argument 561 {Op0, Op1, CarryIn}); in buildUSube() 567 const SrcOp &CarryIn) { in buildSAdde() argument 569 {Op0, Op1, CarryIn}); in buildSAdde() 575 const SrcOp &CarryIn) { in buildSSube() argument 577 {Op0, Op1, CarryIn}); in buildSSube()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/base/wlc/ |
H A D | wlcBlast.c | 392 int Carry = CarryIn; in Wlc_BlastAdderCLA_int() 397 pCar[0] = CarryIn; in Wlc_BlastAdderCLA_int() 425 Wlc_BlastAdderCLA_int( pNew, pAdd0n, pAdd1n, 1<<Log2, CarryIn ); in Wlc_BlastAdderCLA() 440 int Carry = CarryIn; in Wlc_BlastAdderFast_int() 448 pGen[0] = CarryIn; in Wlc_BlastAdderFast_int() 514 Wlc_BlastAdderFast_int( pNew, pAdd0n, pAdd1n, Log2, CarryIn ); in Wlc_BlastAdderFast() 1336 int CarryIn = 0; in Wlc_NtkBitBlast() local 1382 CarryIn = Gia_Obj2Lit(pExtra, Gia_ManPi(pExtra, nRange0+nRange1)); in Wlc_NtkBitBlast() 1749 int CarryIn = Wlc_ObjFaninNum(pObj) == 3 ? pFans2[0] : 0; in Wlc_NtkBitBlast() local 1769 int CarryIn = pFans1[0]; int j; in Wlc_NtkBitBlast() local [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVPseudos.td | 895 bit CarryIn, 898 !if(CarryIn, 1491 // For vadc and vsbc, CarryIn == 1 and CarryOut == 0 1492 multiclass VPseudoBinaryV_VM<bit CarryOut = 0, bit CarryIn = 1, 1495 def "_VV" # !if(CarryIn, "M", "") # "_" # m.MX : 1497 !if(!and(CarryIn, !not(CarryOut)), 1502 multiclass VPseudoBinaryV_XM<bit CarryOut = 0, bit CarryIn = 1, 1505 def "_VX" # !if(CarryIn, "M", "") # "_" # m.MX : 1507 !if(!and(CarryIn, !not(CarryOut)), 1523 def "_VI" # !if(CarryIn, "M", "") # "_" # m.MX : [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVPseudos.td | 895 bit CarryIn, 898 !if(CarryIn, 1491 // For vadc and vsbc, CarryIn == 1 and CarryOut == 0 1492 multiclass VPseudoBinaryV_VM<bit CarryOut = 0, bit CarryIn = 1, 1495 def "_VV" # !if(CarryIn, "M", "") # "_" # m.MX : 1497 !if(!and(CarryIn, !not(CarryOut)), 1502 multiclass VPseudoBinaryV_XM<bit CarryOut = 0, bit CarryIn = 1, 1505 def "_VX" # !if(CarryIn, "M", "") # "_" # m.MX : 1507 !if(!and(CarryIn, !not(CarryOut)), 1523 def "_VI" # !if(CarryIn, "M", "") # "_" # m.MX : [all …]
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/dports/archivers/upx/upx-3.96/src/stub/src/arch/arm/v4t/ |
H A D | nrv2b_d8.S | 78 adc bits,bits @ double and insert CarryIn as low bit
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H A D | nrv2b_d32.S | 125 adcs bits,bits,bits @ Carry= next_bit; set bit0 flag from CarryIn
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/dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 330 unsigned CarryIn = MRI.createGenericVirtualRegister(LLT::scalar(1)); in narrowScalar() local 331 MIRBuilder.buildConstant(CarryIn, 0); in narrowScalar() 338 Src2Regs[i], CarryIn); in narrowScalar() 341 CarryIn = CarryOut; in narrowScalar() 1150 unsigned CarryIn = MI.getOperand(4).getReg(); in lower() local 1156 MIRBuilder.buildZExt(ZExtCarryIn, CarryIn); in lower()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVPseudos.td | 1024 bit CarryIn, 1027 !if(CarryIn, 1657 // For vadc and vsbc, CarryIn == 1 and CarryOut == 0 1658 multiclass VPseudoBinaryV_VM<bit CarryOut = 0, bit CarryIn = 1, 1661 def "_VV" # !if(CarryIn, "M", "") # "_" # m.MX : 1663 !if(!and(CarryIn, !not(CarryOut)), 1668 multiclass VPseudoBinaryV_XM<bit CarryOut = 0, bit CarryIn = 1, 1671 def "_VX" # !if(CarryIn, "M", "") # "_" # m.MX : 1673 !if(!and(CarryIn, !not(CarryOut)), 1689 def "_VI" # !if(CarryIn, "M", "") # "_" # m.MX : [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVPseudos.td | 1024 bit CarryIn, 1027 !if(CarryIn, 1657 // For vadc and vsbc, CarryIn == 1 and CarryOut == 0 1658 multiclass VPseudoBinaryV_VM<bit CarryOut = 0, bit CarryIn = 1, 1661 def "_VV" # !if(CarryIn, "M", "") # "_" # m.MX : 1663 !if(!and(CarryIn, !not(CarryOut)), 1668 multiclass VPseudoBinaryV_XM<bit CarryOut = 0, bit CarryIn = 1, 1671 def "_VX" # !if(CarryIn, "M", "") # "_" # m.MX : 1673 !if(!and(CarryIn, !not(CarryOut)), 1689 def "_VI" # !if(CarryIn, "M", "") # "_" # m.MX : [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVPseudos.td | 1024 bit CarryIn, 1027 !if(CarryIn, 1657 // For vadc and vsbc, CarryIn == 1 and CarryOut == 0 1658 multiclass VPseudoBinaryV_VM<bit CarryOut = 0, bit CarryIn = 1, 1661 def "_VV" # !if(CarryIn, "M", "") # "_" # m.MX : 1663 !if(!and(CarryIn, !not(CarryOut)), 1668 multiclass VPseudoBinaryV_XM<bit CarryOut = 0, bit CarryIn = 1, 1671 def "_VX" # !if(CarryIn, "M", "") # "_" # m.MX : 1673 !if(!and(CarryIn, !not(CarryOut)), 1689 def "_VI" # !if(CarryIn, "M", "") # "_" # m.MX : [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVPseudos.td | 1024 bit CarryIn, 1027 !if(CarryIn, 1657 // For vadc and vsbc, CarryIn == 1 and CarryOut == 0 1658 multiclass VPseudoBinaryV_VM<bit CarryOut = 0, bit CarryIn = 1, 1661 def "_VV" # !if(CarryIn, "M", "") # "_" # m.MX : 1663 !if(!and(CarryIn, !not(CarryOut)), 1668 multiclass VPseudoBinaryV_XM<bit CarryOut = 0, bit CarryIn = 1, 1671 def "_VX" # !if(CarryIn, "M", "") # "_" # m.MX : 1673 !if(!and(CarryIn, !not(CarryOut)), 1689 def "_VI" # !if(CarryIn, "M", "") # "_" # m.MX : [all …]
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