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Searched refs:DCSR_STOPSTATE (Results 1 – 25 of 75) sorted by relevance

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/dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/
H A Ddma.h209 #define DCSR_STOPSTATE bit(3) macro
/dports/devel/codeblocks/codeblocks-20.03/src/plugins/scriptedwizard/resources/arm/files/phyCORE-PXA255/h/
H A Dpxa255regs.h74 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/dma/
H A Dmmp_pdma.c36 #define DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */ macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/dma/
H A Dmmp_pdma.c36 #define DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/dma/
H A Dmmp_pdma.c36 #define DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ macro

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